diff --git a/ARCHITECTURE.md b/ARCHITECTURE.md
index ace8ca7..25fbc66 100644
--- a/ARCHITECTURE.md
+++ b/ARCHITECTURE.md
@@ -135,6 +135,8 @@ Blanton_TTL_Script/
 │   ├── 100G_PRBS.txt                      # 100G PRBS 原始指令（port_prbs_monitor.sh 的來源）
 │   ├── TR518.txt                          # 內建封包測試 tr 518 → blanton_tr518.sh
 │   ├── BER_Test.txt                       # 全機 PRBS BER 指令 → blanton_ber.sh
+│   ├── Multiphase_{high3,low3,comboA,comboB,Save}.txt  # → blanton_multiphase_margin.sh
+│   ├── Multiphase_Netname                 # 38 條軌的 net 名稱（區塊順序對應）
 │   ├── 100G_Traffic.txt                   # ce0 VLAN 138 打流 → blanton_traffic_linespeed.sh
 │   ├── fan_ctrl.txt                       # MAX31790 unbind/bind + fan-speed-control.sh 30
 │   └── gen_channel_map.sh                 # settings/*.conf → docs/LTC2980_channel_map.csv（需 gawk）
@@ -190,6 +192,7 @@ Blanton_TTL_Script/
             │                              #   eth0→TARGET_10G、eth1→TARGET_1G，兩張卡同時持續 ping
             ├── port_prbs_monitor.sh       # 100G uplink PRBS 測試（bcmcmd phy diag）
             ├── blanton_ber.sh             # 全機 SerDes BER 掃描（phydiag prbs / prbsstat）
+            ├── blanton_multiphase_margin.sh # 多相 VRM margin（原生 i2c，38 條軌）
             ├── nfc_polling.sh             # NFC tag 背景輪詢 + PASS/FAIL 統計
             ├── blantons_nfc_validate.py   # NFC/NCI 驗證工具（廠商提供，未修改）
             ├── blanton_tr518.sh           # TR518 封包測試，量功耗前的負載來源
@@ -357,17 +360,18 @@ PROFILE_CHANNELS=( "0:high:8" "1:low:8" ... )   # "channel:operation:change_perc
 
 | 模組 | 進入點 | 功能 |
 |------|--------|------|
-| **Script A（Pre-test）** | `1_Blanton_Script_A.ttl` V1.1.4 | root 登入 → `date -s` 對時 → 清 job log → **收掉前一輪殘留**（`hw-test-session finish` → `bgctl reset --yes` → `bgctl stop --all` → `bgctl list` 確認清空）→ `hw-test-session start` → **設定風扇轉速** → **等資料面就緒**（`wait_init.ttl`）→ DUT 清單（boot/version/fwutil/syseeprom/ssdhealth/TPM/NVMe）→ BMC enroll + version/status → source bash 工具 → 清/讀 7 組 PCIe AER + `ras-mc-ctl --summary` → `lspci` → margin → PMON → dmesg → **10G/1G 管理網路 ping** → **NFC 基線**（start → 30s → stop → report）→ 100G uplink 設定與狀態 → **一輪流量基線** → `show uptime` |
-| **Script B（Stress）** | `2_Blanton_Script_B.ttl` | `mlucas-avx2 -cpu 0:15` + `bgctl run` 的 `memtester` / SSD / USB 壓力 + BMC DDR（`bmc-manager run memtester`）→ BMC USB net test（探測 cdc_ncm 介面，`systemd-run` 掛 4 小時 ping）→ 啟動 mgmt ping 監控 → **啟動 NFC 輪詢** → `jobs` / `bgctl list` → traffic（依 `SWB_UNIT`）→ `while 1` 每輪 PMON + `bgctl list`/`jobs` + `pause 60`（**V1.1.4 起 margin 不在迴圈內**）|
+| **Script A（Pre-test）** | `1_Blanton_Script_A.ttl` V1.1.5 | root 登入 → `date -s` 對時 → 清 job log → **收掉前一輪殘留**（`hw-test-session finish` → `bgctl reset --yes` → `bgctl stop --all` → `bgctl list` 確認清空）→ `hw-test-session start` → **設定風扇轉速** → **等資料面就緒**（`wait_init.ttl`）→ DUT 清單（boot/version/fwutil/syseeprom/ssdhealth/TPM/NVMe）→ BMC enroll + version/status → source bash 工具 → 清/讀 7 組 PCIe AER + `ras-mc-ctl --summary` → `lspci` → margin → PMON → dmesg → **10G/1G 管理網路 ping** → **NFC 基線**（start → 30s → stop → report）→ 100G uplink 設定與狀態 → **一輪流量基線** → `show uptime` |
+| **Script B（Stress）** | `2_Blanton_Script_B.ttl` | `mlucas-avx2 -cpu 0:15` + `bgctl run` 的 `memtester` / SSD / USB 壓力（v1.1.5 起 SSD/USB `--runtime 86400`、BMC memtester 不帶次數 = 跑到被停） + BMC DDR（`bmc-manager run memtester`）→ BMC USB net test（探測 cdc_ncm 介面，`systemd-run` 掛 4 小時 ping）→ 啟動 mgmt ping 監控 → **啟動 NFC 輪詢** → `jobs` / `bgctl list` → traffic（依 `SWB_UNIT`）→ `while 1` 每輪 PMON + `bgctl list`/`jobs` + `pause 60`（**V1.1.4 起 margin 不在迴圈內**）|
 | **Script C（Post-test）** | `3_Blanton_Script_C.ttl` | `kill $(jobs -p)` + `bgctl stop --all` / `reset` + 停 BMC USB unit、mgmt ping 與 **NFC 輪詢** → PMON + dmesg → 7 組 AER + `ras-mc-ctl` → BMC USB `journalctl` → `ip -s link show eth0/eth1` → `cat` mlucas log → **NFC `report`** → traffic `stop` + `report` → **BER 掃描**（依 `SWB_UNIT`）→ NVMe 健康 → `show reboot-cause` → **margin 掃描**（`EN_Margin`，V1.1.4 由 Script B 移來）→ `uptime` → **job log 複製到 USB（帶時戳）** → `exit` + wait『Script done』→ `hw-test-session finish` |
 | **Script 4（Thermal / Safety）** | `4_Blanton_Script_thermal_safety.ttl` | **獨立腳本，不接 A→B→C。** Script A 式的環境建立（登入 / session / 風扇 / `wait_init` / DUT 清單 / BMC / PCIe 清除 / `pcie_bus` / PMON / dmesg）→ **滿載**（`mlucas-avx2 -cpu 0:15` 背景 + `blanton_tr518.sh start`）→ `while 1`：PMON + `TH6_SWB0/1_power_readback.sh` + `bgctl list` / `jobs`，`pause 60`。**沒有收尾段** —— 中斷後 DUT 仍在 `port cd lb=mac` / `l2 learn off` / `test mode nr=yes`，要手動 `blanton_tr518.sh stop` |
-| **SWB loopback 流量** | `blanton_traffic_linespeed <sub> [-u 0\|1\|all]` | `init`（VLAN 30..137，成對 `cdN`/`cdN+32`）→ `clear` → `start`（`tx 100 length=512`）→ `stop` → `report`（per-pair TX/RX 交叉比對 PASS/FAIL）；另有 `ps`（link/speed）與 `run`（一條龍）。**V0.6.0 起含 100G uplink `ce0`**（VLAN 138）：它沒有 loopback 對象，靠 **ingress mirror 打回自己**維持循環，`report` 最後一列就是它，底下再接一份跨 unit summary |
+| **SWB loopback 流量** | `blanton_traffic_linespeed <sub> [-u 0\|1\|all]` | `init`（VLAN 30..137，成對 `cdN`/`cdN+32`）→ `clear` → `start`（`tx 200 length=324 PatternRandom=yes`，v0.7.0 起）→ `stop` → `report`（per-pair TX/RX 交叉比對 PASS/FAIL）；另有 `ps`（link/speed）與 `run`（一條龍）。**V0.6.0 起含 100G uplink `ce0`**（VLAN 138）：它沒有 loopback 對象，靠 **ingress mirror 打回自己**維持循環，`report` 最後一列就是它，底下再接一份跨 unit summary |
 | **FPGA 暫存器存取** | `cb_fpga <fn> <addr> [data]`、`fpga_rescan` | pcimem 打 `resource0` + BAR 相對 offset，32-bit word；BDF 於 source 時自動偵測；`pmc/icb/swb0/swb1_fpga` 走 VSPI 窗口 |
 | **CB I2C / PMBus** | `cb_i2c_init/scan/read/write`、`cb_pmbus_read/write/linear16` | FPGA F3 OpenCores master，**讀用 Repeated START**（SMBus/PMBus 裝置必需） |
 | **ICB / PDB 存取** | `vi2c_init/scan/read/write`、`vi2c_scan_all` | CB F3 VI2C proxy，~3.3 ms/reg，取代 VSPI 的 ~18 ms/reg（後者會踩 SMBus 25–35 ms timeout） |
 | **溫度** | `temp_cb` / `temp_icb` / `temp_all` | TMP75（12-bit 左靠齊 ×0.0625）、TMP432（含 RANGE bit 的 −64 偏移、remote1/2） |
 | **電源資料** | `pwr_data` / `pwr_data_pdb` / `pwr_pdb_id` | SWB VRM 全軌 Vin/Vout/Iout/Temp 對齊表；MP29816 解析度**執行期從 `MFR_VOUT_SCALE_LOOP` 讀**，不寫死 |
 | **電壓 Margin** | `margin_init/status/set/apply_profile/save` + `*_all.sh` | 9 顆 LTC2980（CB CONN13、SWB0/1 CONN13~16）批次 high/low margin 與狀態掃描。`VNOM` 為 Blanton 實測中位數（2026-08-30）；SWB 的 profile 是 per-CONN，套錯 CONN 會 margin 到錯的軌且不報錯。v2.6.0 起 SWB 路徑真正接上共用 cb_i2c 後端，並有 `margin_swb_info/probe/scan/reset/sem` 除錯包裝 |
+| **Multiphase VRM margin** | `blanton_multiphase_margin.sh {high3\|low3\|comboA\|comboB\|save} [-u 0\|1\|all]` | 兩片 SWB 的多相控制器（**不是** `margin.sh` 管的 LTC2980），走原生 i2c bus：SWB0 = `/dev/i2c-13`+`-15`、SWB1 = `-14`+`-16`。每片 19 條軌、共 38 條，逐條印 `SWB0_0V9_ANLG0 - 0.930V Configure Done`。`save` 沒有 per-rail 對應，只印 `Multiphase Save All`。⚠️ `save` 是 `STORE_USER_ALL`（0x15，TH6 core 用 0x17）**永久寫 NVM**；⚠️ 與 `margin.sh` 從兩側摸同一批軌，**不可同時用** |
 | **Margin 寫 NVM** | `margin_save` / `margin_save all` / `margin_save blanton` | ⚠️ 永久寫入。`0x15` 送 PMBus **send-byte**（不帶 data byte）。`all` = 依 `settings/` 走 9 顆、跑完還原原本載入的板子；`blanton` = 本平台捷徑，18 顆全走原生 i2c bus（`MARGIN_BLANTON_STORE` 表），不需 `margin_init`。每筆之間 `MARGIN_STORE_SETTLE`（0.5s），工具**不 poll busy bit** |
 | **管理網路 ping** | `mgmt_ping_monitor.sh {start\|stop\|status\|fg\|tail\|clear\|summary}` | 一輪 = 10G leg + 1G leg，各自 `ip address/route replace` 後 `ping -I <if>` 打自己的對端；兩張卡都保持 up。每 leg 記 `ip -s link show` 與該卡的 TX/RX packet delta，另出一行可 grep 的 `RESULT` |
 | **BMC 監控** | `bmc_monitor.sh {start\|stop\|status\|fg\|tail\|clear}` | 由 host 端 `bmc-manager run` 週期取樣 `free -m`，另加一組 **I2C 寫入/讀回圖樣測試**（bus 1、addr 0x41、offset 0x00C0，寫 `55AA55AA` 讀回、再寫 `AA55AA55` 讀回）。B 啟動、C 停止並 `cat log/bmc_poll.log` |
@@ -804,6 +808,12 @@ margin status、全部 VRM 軌的 Vin/Vout/Iout/Temp、CB + ICB 溫感讀值，
   **`sleep 120` 的方向還沒驗證** —— 若 `tr 518` 的流量是有時限的（參數含 `runtime=1`、
   `CheckDataTime=200`），等 120 秒可能量到已經降下來的值，要上機比對 0s / 30s / 120s 三次；
   TTL 尚未呼叫它。
+- **`--runtime 86400` 是 24 小時的上限，不是「永遠」**：超過一天的 soak，SSD 與 USB 壓力會在
+  第 24 小時安靜結束，剩下的時間那兩項是閒置的。Script B 每輪都印 `bgctl list`，數量變少會看得到，
+  但**沒有任何東西會主動報警**。真的要跑更久，得把數字改大或加一段重啟 job 的邏輯。
+- **`blanton_multiphase_margin.sh` 與 `margin.sh` 沒有互斥機制**：兩支從不同側（原生 i2c vs
+  LTC2980 PMBus）摸同一批軌，各自都假設自己是唯一的寫入者。目前只靠文件與 help 提醒，
+  沒有任何執行期檢查。
 - **Script 4 沒有收尾段**：`while 1` 之後就是檔案結尾，中斷時 DUT 停在 `port cd lb=mac` /
   `l2 learn off` / `test mode nr=yes`，而且 `mlucas-avx2` 還在背景跑。要手動
   `blanton_tr518.sh stop` + `kill`，否則下一輪任何測試都在被污染的狀態上開始
diff --git a/CLAUDE.md b/CLAUDE.md
index 024aa77..9304368 100644
--- a/CLAUDE.md
+++ b/CLAUDE.md
@@ -9,7 +9,7 @@ DUT 端的取數能力由一組 **bash 工具庫** 提供（CB FPGA `pcimem` →
 
 完整架構見 [ARCHITECTURE.md](ARCHITECTURE.md)。
 
-**目前狀態（2026-08-31）**：Script A 為 **V1.1.4**（A 集中記錄所有 TTL 的變更）。涵蓋
+**目前狀態（2026-09-01）**：Script A 為 **V1.1.5**（A 集中記錄所有 TTL 的變更）。涵蓋
 PCIe AER / DDR EDAC / PMON+TPM / 電壓 margin（9 顆 LTC2980）/ SWB loopback 線速流量 /
 10G+1G 管理網路 ping / BMC DDR 與 USB / NVMe 健康，壓力層走平台的 `bgctl`。
 switch unit 數量由 `config.ttl` 的 `SWB_UNIT0` / `SWB_UNIT1` 宣告，風扇轉速由 `FAN_SPEED` 指定
@@ -26,7 +26,7 @@ NFC tag 讀取由 `nfc_polling.sh` 背景輪詢（A 做基線、B 起、C 停並
 另有 **`4_Blanton_Script_thermal_safety.ttl`**（熱 / 安規，**獨立跑不接 A→B→C**，滿載後每分鐘
 取 PMON + 兩片 SWB 的軌功耗；**沒有收尾段**，中斷後要手動 `blanton_tr518.sh stop`）。
 流程圖：`docs/Blanton_Test_Flow.drawio`。
-最後一次發布是 **V1.1.3**；SWB 的 I2C 通道與位址已於 2026-08-19 上機驗證。
+最後一次發布是 **V1.1.4**；SWB 的 I2C 通道與位址已於 2026-08-19 上機驗證。
 margin 的 `VNOM` 已於 2026-08-30 改為 Blanton 實測中位數（144 條軌中 86 條上調 0.8~2.5%）。
 交付用 `./publish/publish.sh` 打包。
 
@@ -117,6 +117,16 @@ bash ~/Blanton_Script/port_prbs_monitor.sh report       # PASS/FAIL 統計（沒
 bash ~/Blanton_Script/port_prbs_monitor.sh stop         # 收尾會跑 prbsstat STOp + prbs clear
 #   ⚠️ PRBS 打起來時 link 會顯示 down，這是正常的 —— 所以 start 刻意不印 port status
 
+# ── 多相 VRM margin（原生 i2c，38 條軌）──────────────
+./Blanton_Script/blanton_multiphase_margin.sh high3    # 全部 +3%
+./Blanton_Script/blanton_multiphase_margin.sh low3     # 全部 -3%
+./Blanton_Script/blanton_multiphase_margin.sh comboA   # 混合，組合 A
+./Blanton_Script/blanton_multiphase_margin.sh comboB   # 混合，組合 B
+./Blanton_Script/blanton_multiphase_margin.sh save     # ⚠️ 永久寫 NVM
+#   -u 0 / -u 1 單邊（SWB0=i2c-13/15，SWB1=i2c-14/16）；-n 只印指令
+#   逐條印 SWB0_0V9_ANLG0 - 0.930V Configure Done；save 只印 Multiphase Save All
+#   ⚠️ 這不是 margin.sh 管的 LTC2980，兩支摸同一批軌，不要同時用
+
 # ── 全機 SerDes BER（PRBS，期間 link 會顯示 DOWN）────
 ./Blanton_Script/blanton_ber.sh init          # prbs set p=3 + prbs get（檢查每條 lane 鎖定）
 ./Blanton_Script/blanton_ber.sh start         # prbsstat STArt Interval=30
@@ -222,6 +232,12 @@ Tera Term 連 COM port (115200-8-N-1)
 - ⚠️ **ICB/PDB 一律走 VI2C（`blanton_icb_vi2c.sh`），不要走 VSPI**：VSPI ~18 ms/reg 會讓 I2C
   byte 相間隔拉到 ~50 ms，踩中 SMBus 25–35 ms timeout，裝置直接 NACK。實測全掃 9.4 s vs 34.0 s。
 - ⚠️ **I2C 讀一律 Repeated START**（不是 STOP + START），否則 PMBus/SMBus 裝置（VRM、EFUSE）不理。
+- ⚠️ **`--runtime 86400` 是 24 小時上限**：超過一天的 soak，SSD / USB 壓力會安靜結束，
+  剩下的時間那兩項閒置。`bgctl list` 的數量變少是唯一的線索，**不會報警**
+- ⚠️ **多相 VRM 與 LTC2980 是同一批軌的兩條路**：`blanton_multiphase_margin.sh`（原生 i2c）
+  和 `margin.sh`（LTC2980 PMBus）都假設自己是唯一寫入者，**沒有互斥檢查**，只靠人記得
+- ⚠️ **traffic 的計數器基準在 v0.7.0 變了**：`tx 100 length=512` → `tx 200 length=324`，
+  每 burst 的位元組數 +27%。PASS/FAIL 是成對交叉比對不受影響，但**絕對值不能跟舊 log 比**
 - ⚠️ **Script 4（thermal/safety）沒有收尾**：`while 1` 之後就是檔尾。中斷後 DUT 停在
   `port cd lb=mac` / `l2 learn off` / `test mode nr=yes`，`mlucas-avx2` 也還在背景。
   下一個測試會在被污染的狀態上開始，而且 **`show interfaces status` 看不出來**。
diff --git a/docs/release-notes/v1.1.5.md b/docs/release-notes/v1.1.5.md
new file mode 100644
index 0000000..c54b32b
--- /dev/null
+++ b/docs/release-notes/v1.1.5.md
@@ -0,0 +1,67 @@
+# v1.1.5 — The stress jobs now last the whole soak
+
+## 🐛 Bug fixes
+
+**USB stress ran for sixty seconds of an overnight soak**
+* `qfx5252-stress-usb` was started with `--runtime 60`. It finished a minute in and the USB path sat idle for the rest of the night. Nothing failed, nothing said so, and the run looked complete.
+* SSD stress had the same shape at `--runtime 3600` — one hour of a soak that usually runs far longer.
+* Both are now `--runtime 86400`, and the BMC DDR memtester lost its loop count (`64M 1` → `64M`) so it runs until it is stopped rather than finishing one pass.
+* **86400 is 24 hours, not "forever".** A soak longer than a day leaves SSD and USB dead for the remainder. Script B prints `bgctl list` every round (since v1.0.10), so the shorter list is visible there — but nothing raises an alarm.
+
+## ✨ New features
+
+**Multiphase VRM margin**
+* New `blanton_multiphase_margin.sh` drives the multiphase controllers on both switch boards over the native i2c buses — SWB0 on `/dev/i2c-13` and `-15`, SWB1 on `-14` and `-16`. 19 rails per board, 38 in all.
+* `high3` / `low3` / `comboA` / `comboB` set the voltages and report one line per rail:
+
+  ```
+  SWB0_0V9_ANLG0 - 0.930V Configure Done
+  SWB0_0V75_ANLG0 - 0.775V Configure Done
+  ...
+  [ OK ] high3: 38 rail(s) configured
+  ```
+* `save` commits them. It has no per-rail mapping, so it reports as one operation: `Multiphase Save All`.
+* `-u 0` / `-u 1` for a single board; rails belonging to the other board are skipped and counted separately, not failed.
+* **`save` writes NVM permanently** (PMBus `STORE_USER_ALL`, and `0x17` on the TH6 core rail). A power cycle does not undo it.
+* **These are not the LTC2980s that `margin.sh` drives.** The two tools reach the same rails from different sides and each assumes it is the only writer. There is no interlock — do not run both.
+
+**Traffic bursts carry a random pattern**
+* `blanton_traffic_linespeed` v0.7.0 appends `PatternRandom=yes` to every `tx`, `ce0` included. A fixed pattern can sit on a benign bit sequence for an entire run; a changing one is what makes a weak lane show itself.
+* `-r no` forces the fixed pattern; `-r ""` leaves the argument off entirely, which is the pre-v0.7.0 wire format if a future SDK rejects it.
+* Defaults change from `tx 100 length=512` to `tx 200 length=324`.
+* **Counter totals are not comparable across this build**: 64800 bytes per burst instead of 51200, about 27% more. The PASS/FAIL cross-check compares a pair against each other and is unaffected — only absolute figures moved.
+
+## 📦 Downloads
+
+| File | Contents |
+|---|---|
+| `Script_ABC_Blanton_V1.1.5.zip` | The full Tera Term working directory, including `Blanton_Script/` to copy onto the DUT |
+
+**After copying to the DUT:**
+
+```bash
+chmod +x ~/Blanton_Script/*.sh      # see below
+grep -rlU $'\r' ~/Blanton_Script    # expect no output
+```
+
+`blanton_ber.sh`, `nfc_polling.sh`, `blanton_tr518.sh`, `blanton_multiphase_margin.sh` and the two `TH6_SWB*_power_readback.sh` are invoked through `./` or `~/`, so they need the execute bit along with `bmc_monitor.sh` and `usb_target.sh` — neither git nor a Windows/USB copy carries it reliably.
+
+## ⚠️ Before you run
+
+* **A soak longer than 24 hours needs the runtimes raised.** `--runtime 86400` is a ceiling; past it, SSD and USB are idle and only a shorter `bgctl list` hints at it.
+* **`blanton_multiphase_margin.sh save` is permanent.** Read the rails back before committing, and never run it during a test.
+* **Do not mix `blanton_multiphase_margin.sh` and `margin.sh`** — same rails, two different access paths, no interlock.
+* **Traffic counters changed scale.** Any absolute thresholds taken from earlier logs need redoing.
+* **Script 4 (thermal/safety) has no teardown** — finish with `blanton_tr518.sh stop` and `kill $(jobs -p)`.
+* **These three cannot share the switch**: `blanton_ber.sh`, `blanton_tr518.sh`, `blanton_traffic_linespeed`.
+* **Margin is only sampled at the start and end of a soak** (since v1.1.4), not during it.
+* **`FAN_SPEED` is 100** — the fans run flat out unless you change `config.ttl`.
+* **The three items listed as unverified in v1.1.0 are still unverified**: the `ce0` ingress mirror, the 120s settle in `blanton_tr518.sh`, and `test mode nr=no` on stop.
+
+## 🔗 Links
+
+* [Blanton_Test_Flow.drawio](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/src/branch/main/docs/Blanton_Test_Flow.drawio) — the four scripts side by side
+* [ARCHITECTURE.md](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/src/branch/main/ARCHITECTURE.md) — test flow, data models, constraints
+* [CLAUDE.md](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/src/branch/main/CLAUDE.md) — commands and the bench gotchas
+
+**Full changelog:** [V1.1.4...V1.1.5](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/compare/V1.1.4...V1.1.5)
diff --git a/src/Script_ABC_Blanton/1_Blanton_Script_A.ttl b/src/Script_ABC_Blanton/1_Blanton_Script_A.ttl
index 66c945f..b98f733 100644
--- a/src/Script_ABC_Blanton/1_Blanton_Script_A.ttl
+++ b/src/Script_ABC_Blanton/1_Blanton_Script_A.ttl
@@ -1,7 +1,7 @@
 ; =============================================================================
 ; Script A for Blanton
-; Version : V1.1.4
-; Date    : 2026-08-31
+; Version : V1.1.5
+; Date    : 2026-09-01
 ; Author  : ETWen
 ; =============================================================================
 ; Version History:
@@ -201,6 +201,38 @@
 ;                                                                         finish - leaves the session shell first, so finish
 ;                                                                         runs in the login shell that opened it
 ;                       docs/Blanton_Test_Flow.drawio                   Add the A/B/C + thermal flow diagram
+;   V1.1.5  2026-09-01  ScriptB                                         Stress jobs now last the whole soak
+;                                                                         BMC DDR   memtester 64M 1 -> 64M   (loop count
+;                                                                                   dropped = runs until stopped)
+;                                                                         SSD       --runtime 3600  -> 86400
+;                                                                         USB       --runtime 60    -> 86400
+;                                                                         The USB one finished after 60 SECONDS, so an
+;                                                                         overnight run had USB idle for all but the first
+;                                                                         minute and nothing said so
+;                                                                         !! 86400 is 24h: a soak longer than that leaves SSD
+;                                                                            and USB dead for the remainder - the per-round
+;                                                                            bgctl list (V1.0.10) is where that shows up
+;                       Blanton_Script/blanton_multiphase_margin.sh     Add multiphase VRM margin over the native i2c buses
+;                                                                         high3 / low3 / comboA / comboB / save, -u 0|1|all
+;                                                                         38 rails (19 per SWB), one line each:
+;                                                                           SWB0_0V9_ANLG0 - 0.930V Configure Done
+;                                                                         save has no per-rail map, prints Multiphase Save All
+;                                                                         !! save is STORE_USER_ALL - permanent, survives a
+;                                                                            power cycle
+;                                                                         !! these are NOT the LTC2980s margin.sh drives; the
+;                                                                            two tools reach the same rails from different
+;                                                                            sides - do not run both
+;                       Blanton_Script/blanton_traffic_linespeed.sh     v0.7.0  tx gains PatternRandom, defaults change
+;                                                                         tx 100 length=512 -> tx 200 length=324
+;                                                                         every burst now ends PatternRandom=yes, ce0 included
+;                                                                         A fixed pattern can sit on a benign bit sequence for
+;                                                                         a whole run; random is what exposes a weak lane
+;                                                                         -r no forces the fixed pattern, -r "" omits the
+;                                                                         argument entirely (pre-v0.7.0 wire format)
+;                                                                         !! bytes per burst went 51200 -> 64800 (+27%), so
+;                                                                            counter totals are not comparable across this
+;                                                                            build - the PASS/FAIL cross-check is unaffected
+;                       tools/Multiphase_*.txt                          Bench command references for the new script
 ; =============================================================================
 include "config.ttl"
 
diff --git a/src/Script_ABC_Blanton/2_Blanton_Script_B.ttl b/src/Script_ABC_Blanton/2_Blanton_Script_B.ttl
index 6187b32..404c476 100644
--- a/src/Script_ABC_Blanton/2_Blanton_Script_B.ttl
+++ b/src/Script_ABC_Blanton/2_Blanton_Script_B.ttl
@@ -26,7 +26,8 @@ sendln "~/hammer/tools/amd/mlucas-avx2 -s l -cpu 0:15 > ~/hammer/tools/amd/mluca
 ;wait prompt_sonic_root
 ;sendln "./Blanton_Script/bmc_monitor.sh start"
 wait prompt_sonic_root
-sendln "bgctl run bmc-manager run '/usr/bin/memtester 64M 1'"
+;sendln "bgctl run bmc-manager run '/usr/bin/memtester 64M 1'"
+sendln "bgctl run bmc-manager run '/usr/bin/memtester 64M'"     ; Continue Execture
 
 ; ========== BMC Monitor Test ==========
 wait prompt_sonic_root
@@ -40,7 +41,7 @@ sendln "bgctl run /usr/sbin/memtester 1G"   ; Continue Execture
 
 ; ========== SSD read/write ==========
 wait prompt_sonic_root
-sendln "bgctl run qfx5252-stress-ssd 1G --runtime 3600 --passes 5 --write --force --log /host/hw-eval/jobs/qfx5252-stress-ssd.log"
+sendln "bgctl run qfx5252-stress-ssd 1G --runtime 86400 --passes 5 --write --force --log /host/hw-eval/jobs/qfx5252-stress-ssd.log"
 
 ; ========== USB read/write ==========
 ; ---- Get USB partition node -> usb_dev ----
@@ -51,7 +52,7 @@ waitregex '<<DEV=([^>]*)>>'
 usb_dev = groupmatchstr1
 
 wait prompt_sonic_root
-sprintf2 cmd "bgctl run qfx5252-stress-usb %s 256M --runtime 60 --passes 1 --write --log /host/hw-eval/jobs/qfx5252-stress-usb.log" usb_dev
+sprintf2 cmd "bgctl run qfx5252-stress-usb %s 256M --runtime 86400 --passes 1 --write --log /host/hw-eval/jobs/qfx5252-stress-usb.log" usb_dev
 sendln cmd
 
 ;wait prompt_sonic_root
diff --git a/src/Script_ABC_Blanton/Blanton_Script/blanton_multiphase_margin.sh b/src/Script_ABC_Blanton/Blanton_Script/blanton_multiphase_margin.sh
new file mode 100644
index 0000000..624c1a3
--- /dev/null
+++ b/src/Script_ABC_Blanton/Blanton_Script/blanton_multiphase_margin.sh
@@ -0,0 +1,1047 @@
+#!/usr/bin/env bash
+# =============================================================================
+# blanton_multiphase_margin.sh  --  multiphase VRM margin over the native i2c bus
+# =============================================================================
+# Version History:
+#   V1.0.0  2026-09-01  First version. Bash port of tools/Multiphase_*.txt.
+#                       high3 / low3 / comboA / comboB / save, -u 0|1|all.
+# =============================================================================
+#
+# These are the multiphase controllers on the two switch boards -- a different
+# set of parts from the LTC2980s that margin.sh drives, reached over the native
+# Linux i2c buses:
+#
+#     SWB0 -> /dev/i2c-13, /dev/i2c-15        SWB1 -> /dev/i2c-14, /dev/i2c-16
+#
+# 19 rails per board, 38 in total. Each rail is one PAGE select plus the write
+# that sets its voltage; the script reports one line per rail:
+#
+#     SWB0_0V9_ANLG0 - 0.930V Configure Done
+#
+# ⚠️ save writes NVM PERMANENTLY (PMBus STORE_USER_ALL 0x15, and 0x17 on the
+#    TH6 core rail). A power cycle does NOT undo it. Never run it during a test,
+#    and confirm the rails read back correctly before you commit them.
+#
+# ⚠️ This drives the SAME rails as margin.sh from the other side. Do not run
+#    both, and do not leave a margin applied here and then use margin.sh -- each
+#    tool assumes it is the only one writing.
+#
+# Usage:
+#   ./blanton_multiphase_margin.sh high3            # all rails +3%
+#   ./blanton_multiphase_margin.sh low3             # all rails -3%
+#   ./blanton_multiphase_margin.sh comboA           # mixed high/low, set A
+#   ./blanton_multiphase_margin.sh comboB           # mixed high/low, set B
+#   ./blanton_multiphase_margin.sh save             # commit to NVM (permanent)
+#   ./blanton_multiphase_margin.sh high3 -u 0       # SWB0 only
+#   ./blanton_multiphase_margin.sh high3 -n         # print commands, touch nothing
+#
+# Options:
+#   -u|--unit <0|1|all>   which switch board (default: both)
+#   -d|--debug            print every i2c command as it runs
+#   -n|--dry-run          print the commands only, do not touch the DUT
+#   -h|--help             help
+# =============================================================================
+
+MP_UNITS="${MP_UNITS:-0 1}"
+MP_DRY_RUN=${MP_DRY_RUN:-0}
+DEBUG_MODE=${DEBUG_MODE:-0}
+
+_mp_info() { echo -e "[\033[34mINFO\033[0m] $*"; }
+_mp_ok()   { echo -e "[\033[32m OK \033[0m] $*"; }
+_mp_warn() { echo -e "[\033[33mWARN\033[0m] $*" >&2; }
+_mp_err()  { echo -e "[\033[31mERR \033[0m] $*" >&2; }
+
+# --- high3 ---------------------------------------------------------------
+MP_DATA_high3="\
+@ SWB0_0V9_ANLG0 0.930V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0x34 0x11
+@ SWB0_0V9_ANLG1 0.930V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0x34 0x11
+@ SWB0_0V75_ANLG0 0.775V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0xAA 0x06
+@ SWB0_0V75_ANLG1 0.775V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P0 0.775V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x52 0x0D
+@ SWB0_PHYTILE_P1 0.775V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P2 0.775V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x52 0x0D
+@ SWB0_PHYTILE_P3 0.775V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P4 0.775V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D  0x52 0x0D
+@ SWB0_PHYTILE_P5 0.775V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P6 0.775V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D  0x52 0x0D
+@ SWB0_PHYTILE_P7 0.775V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0xAA 0x06
+@ SWB0_PVDD1V5_CNDR0 1.545V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x91 0x20
+@ SWB0_PVDD1V5_CNDR1 1.545V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x49 0x10
+@ SWB0_PVDDA_PHYT0 0.745V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x94 0x0C
+@ SWB0_PVDDA_PHYT1 0.745V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0x4C 0x06
+@ SWB0_PVDDA_PHYT2 0.745V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x94 0x0C
+@ SWB0_PVDDA_PHYT3 0.745V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0x4C 0x06
+@ SWB0_TH6_CORE 0.885V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x62 0x01
+@ SWB1_0V9_ANLG0 0.930V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0x34 0x11
+@ SWB1_0V9_ANLG1 0.930V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0x34 0x11
+@ SWB1_0V75_ANLG0 0.775V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0xAA 0x06
+@ SWB1_0V75_ANLG1 0.775V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P0 0.775V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x52 0x0D
+@ SWB1_PHYTILE_P1 0.775V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P2 0.775V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x52 0x0D
+@ SWB1_PHYTILE_P3 0.775V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P4 0.775V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D  0x52 0x0D
+@ SWB1_PHYTILE_P5 0.775V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P6 0.775V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D  0x52 0x0D
+@ SWB1_PHYTILE_P7 0.775V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0xAA 0x06
+@ SWB1_PVDD1V5_CNDR0 1.545V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x91 0x20
+@ SWB1_PVDD1V5_CNDR1 1.545V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x49 0x10
+@ SWB1_PVDDA_PHYT0 0.745V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x94 0x0C
+@ SWB1_PVDDA_PHYT1 0.745V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0x4C 0x06
+@ SWB1_PVDDA_PHYT2 0.745V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x94 0x0C
+@ SWB1_PVDDA_PHYT3 0.745V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0x4C 0x06
+@ SWB1_TH6_CORE 0.885V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x62 0x01
+"
+
+# --- low3 ---------------------------------------------------------------
+MP_DATA_low3="\
+@ SWB0_0V9_ANLG0 0.870V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0xB4 0x0F
+@ SWB0_0V9_ANLG1 0.870V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0xB4 0x0F
+@ SWB0_0V75_ANLG0 0.725V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0x0A 0x06
+@ SWB0_0V75_ANLG1 0.725V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P0 0.725V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P1 0.725V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P2 0.725V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P3 0.725V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P4 0.725V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P5 0.725V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P6 0.725V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P7 0.725V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0x0A 0x06
+@ SWB0_PVDD1V5_CNDR0 1.455V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x51 0x1E
+@ SWB0_PVDD1V5_CNDR1 1.455V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x29 0x0F
+@ SWB0_PVDDA_PHYT0 0.695V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x54 0x0B
+@ SWB0_PVDDA_PHYT1 0.695V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0xAC 0x05
+@ SWB0_PVDDA_PHYT2 0.695V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x54 0x0B
+@ SWB0_PVDDA_PHYT3 0.695V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0xAC 0x05
+@ SWB0_TH6_CORE 0.753V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x2D 0x01
+@ SWB1_0V9_ANLG0 0.870V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0xB4 0x0F
+@ SWB1_0V9_ANLG1 0.870V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0xB4 0x0F
+@ SWB1_0V75_ANLG0 0.725V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0x0A 0x06
+@ SWB1_0V75_ANLG1 0.725V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P0 0.725V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P1 0.725V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P2 0.725V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P3 0.725V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P4 0.725V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P5 0.725V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P6 0.725V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P7 0.725V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0x0A 0x06
+@ SWB1_PVDD1V5_CNDR0 1.455V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x51 0x1E
+@ SWB1_PVDD1V5_CNDR1 1.455V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x29 0x0F
+@ SWB1_PVDDA_PHYT0 0.695V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x54 0x0B
+@ SWB1_PVDDA_PHYT1 0.695V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0xAC 0x05
+@ SWB1_PVDDA_PHYT2 0.695V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x54 0x0B
+@ SWB1_PVDDA_PHYT3 0.695V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0xAC 0x05
+@ SWB1_TH6_CORE 0.753V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x2D 0x01
+"
+
+# --- comboA ---------------------------------------------------------------
+MP_DATA_comboA="\
+@ SWB0_0V9_ANLG0 0.930V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0x34 0x11
+@ SWB0_0V9_ANLG1 0.930V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0x34 0x11
+@ SWB0_0V75_ANLG0 0.725V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0x0A 0x06
+@ SWB0_0V75_ANLG1 0.725V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P0 0.725V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P1 0.725V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P2 0.725V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P3 0.725V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P4 0.725V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P5 0.725V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0x0A 0x06
+@ SWB0_PHYTILE_P6 0.725V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D 0x12 0x0C
+@ SWB0_PHYTILE_P7 0.725V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0x0A 0x06
+@ SWB0_PVDD1V5_CNDR0 1.545V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x91 0x20
+@ SWB0_PVDD1V5_CNDR1 1.545V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x49 0x10
+@ SWB0_PVDDA_PHYT0 0.745V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x94 0x0C
+@ SWB0_PVDDA_PHYT1 0.745V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0x4C 0x06
+@ SWB0_PVDDA_PHYT2 0.745V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x94 0x0C
+@ SWB0_PVDDA_PHYT3 0.745V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0x4C 0x06
+@ SWB0_TH6_CORE 0.885V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x62 0x01
+@ SWB1_0V9_ANLG0 0.930V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0x34 0x11
+@ SWB1_0V9_ANLG1 0.930V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0x34 0x11
+@ SWB1_0V75_ANLG0 0.725V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0x0A 0x06
+@ SWB1_0V75_ANLG1 0.725V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P0 0.725V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P1 0.725V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P2 0.725V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P3 0.725V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P4 0.725V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P5 0.725V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0x0A 0x06
+@ SWB1_PHYTILE_P6 0.725V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D 0x12 0x0C
+@ SWB1_PHYTILE_P7 0.725V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0x0A 0x06
+@ SWB1_PVDD1V5_CNDR0 1.545V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x91 0x20
+@ SWB1_PVDD1V5_CNDR1 1.545V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x49 0x10
+@ SWB1_PVDDA_PHYT0 0.745V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x94 0x0C
+@ SWB1_PVDDA_PHYT1 0.745V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0x4C 0x06
+@ SWB1_PVDDA_PHYT2 0.745V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x94 0x0C
+@ SWB1_PVDDA_PHYT3 0.745V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0x4C 0x06
+@ SWB1_TH6_CORE 0.885V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x62 0x01
+"
+
+# --- comboB ---------------------------------------------------------------
+MP_DATA_comboB="\
+@ SWB0_0V9_ANLG0 0.870V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0xB4 0x0F
+@ SWB0_0V9_ANLG1 0.870V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0xB4 0x0F
+@ SWB0_0V75_ANLG0 0.775V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0xAA 0x06
+@ SWB0_0V75_ANLG1 0.775V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P0 0.775V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x52 0x0D
+@ SWB0_PHYTILE_P1 0.775V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P2 0.775V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x52 0x0D
+@ SWB0_PHYTILE_P3 0.775V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P4 0.775V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D  0x52 0x0D
+@ SWB0_PHYTILE_P5 0.775V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0xAA 0x06
+@ SWB0_PHYTILE_P6 0.775V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D  0x52 0x0D
+@ SWB0_PHYTILE_P7 0.775V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0xAA 0x06
+@ SWB0_PVDD1V5_CNDR0 1.455V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x51 0x1E
+@ SWB0_PVDD1V5_CNDR1 1.455V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x29 0x0F
+@ SWB0_PVDDA_PHYT0 0.695V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x54 0x0B
+@ SWB0_PVDDA_PHYT1 0.695V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0xAC 0x05
+@ SWB0_PVDDA_PHYT2 0.695V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x54 0x0B
+@ SWB0_PVDDA_PHYT3 0.695V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0xAC 0x05
+@ SWB0_TH6_CORE 0.753V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x2D 0x01
+@ SWB1_0V9_ANLG0 0.870V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0xB4 0x0F
+@ SWB1_0V9_ANLG1 0.870V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0xB4 0x0F
+@ SWB1_0V75_ANLG0 0.775V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0xAA 0x06
+@ SWB1_0V75_ANLG1 0.775V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P0 0.775V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x52 0x0D
+@ SWB1_PHYTILE_P1 0.775V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P2 0.775V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x52 0x0D
+@ SWB1_PHYTILE_P3 0.775V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P4 0.775V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D  0x52 0x0D
+@ SWB1_PHYTILE_P5 0.775V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0xAA 0x06
+@ SWB1_PHYTILE_P6 0.775V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D  0x52 0x0D
+@ SWB1_PHYTILE_P7 0.775V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0xAA 0x06
+@ SWB1_PVDD1V5_CNDR0 1.455V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x51 0x1E
+@ SWB1_PVDD1V5_CNDR1 1.455V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x29 0x0F
+@ SWB1_PVDDA_PHYT0 0.695V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x54 0x0B
+@ SWB1_PVDDA_PHYT1 0.695V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0xAC 0x05
+@ SWB1_PVDDA_PHYT2 0.695V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x54 0x0B
+@ SWB1_PVDDA_PHYT3 0.695V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0xAC 0x05
+@ SWB1_TH6_CORE 0.753V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x2D 0x01
+"
+
+# --- save: STORE_USER_ALL per controller, no per-rail mapping ---------------
+MP_DATA_save="\
+i2cset -f -y 13 0x25 0x00 0
+i2cset -f -y 13 0x25 0x15
+i2cset -f -y 15 0x26 0x00 0
+i2cset -f -y 15 0x26 0x15
+i2cset -f -y 13 0x25 0x00 0
+i2cset -f -y 13 0x25 0x15
+i2cset -f -y 15 0x26 0x00 0
+i2cset -f -y 15 0x26 0x15
+i2cset -f -y 13 0x21 0x00 0
+i2cset -f -y 13 0x21 0x15
+i2cset -f -y 13 0x22 0x00 0
+i2cset -f -y 13 0x22 0x15
+i2cset -f -y 15 0x23 0x00 0
+i2cset -f -y 15 0x23 0x15
+i2cset -f -y 15 0x24 0x00 0
+i2cset -f -y 15 0x24 0x15
+i2cset -f -y 13 0x29 0x00 0
+i2cset -f -y 13 0x29 0x15
+i2cset -f -y 13 0x27 0x00 0
+i2cset -f -y 13 0x27 0x15
+i2cset -f -y 15 0x28 0x00 0
+i2cset -f -y 15 0x28 0x15
+i2cset -f -y 13 0x20 0x00 0
+i2cset -f -y 13 0x20 0x17
+i2cset -f -y 14 0x25 0x00 0
+i2cset -f -y 14 0x25 0x15
+i2cset -f -y 16 0x26 0x00 0
+i2cset -f -y 16 0x26 0x15
+i2cset -f -y 14 0x25 0x00 0
+i2cset -f -y 14 0x25 0x15
+i2cset -f -y 16 0x26 0x00 0
+i2cset -f -y 16 0x26 0x15
+i2cset -f -y 14 0x21 0x00 0
+i2cset -f -y 14 0x21 0x15
+i2cset -f -y 14 0x22 0x00 0
+i2cset -f -y 14 0x22 0x15
+i2cset -f -y 16 0x23 0x00 0
+i2cset -f -y 16 0x23 0x15
+i2cset -f -y 16 0x24 0x00 0
+i2cset -f -y 16 0x24 0x15
+i2cset -f -y 14 0x29 0x00 0
+i2cset -f -y 14 0x29 0x15
+i2cset -f -y 14 0x27 0x00 0
+i2cset -f -y 14 0x27 0x15
+i2cset -f -y 16 0x28 0x00 0
+i2cset -f -y 16 0x28 0x15
+i2cset -f -y 14 0x20 0x00 0
+i2cset -f -y 14 0x20 0x17
+"
+
+# =============================================================================
+
+_mp_units_check() {
+    local u ok=""
+    for u in ${MP_UNITS}; do
+        case "${u}" in
+            0|1) ok="${ok} ${u}" ;;
+            *)   _mp_err "invalid unit '${u}' (use 0, 1 or all)"; return 1 ;;
+        esac
+    done
+    [ -n "${ok}" ] || { _mp_err "no unit selected"; return 1; }
+    MP_UNITS="${ok# }"
+    return 0
+}
+
+# SWB0 is on /dev/i2c-13 and -15, SWB1 on -14 and -16. Deriving the board from
+# the bus (rather than from line position) means -u still works if the tables
+# are ever reordered.
+_mp_bus_unit() {
+    case "$1" in
+        13|15) echo 0 ;;
+        14|16) echo 1 ;;
+        *)     echo "?" ;;
+    esac
+}
+
+_mp_want_unit() {
+    local u="$1" x
+    for x in ${MP_UNITS}; do [ "${x}" = "${u}" ] && return 0; done
+    return 1
+}
+
+# Runs one i2c command. Word splitting is intentional (the tables hold plain
+# argv), globbing is off so nothing in them can expand.
+_mp_exec() {
+    # argv is  i2cset -f -y <bus> ...   ->  the bus is $4, not $3
+    local bus="$4"
+    if [ "${MP_DRY_RUN}" = "1" ]; then
+        echo "[DRY ] $*"
+        return 0
+    fi
+    [ "${DEBUG_MODE}" = "1" ] && echo -e "\033[90m[DEBG] $*\033[0m" >&2
+    if [ ! -e "/dev/i2c-${bus}" ]; then
+        _mp_err "/dev/i2c-${bus} does not exist"
+        return 1
+    fi
+    "$@" >/dev/null 2>&1
+}
+
+# --- apply a voltage profile -------------------------------------------------
+_MP_NET=""; _MP_VOLT=""; _MP_RFAIL=0; _MP_OK=0; _MP_BAD=0; _MP_SKIP=0
+
+_mp_flush_rail() {
+    [ -n "${_MP_NET}" ] || return 0
+    if [ "${_MP_RFAIL}" -eq 0 ]; then
+        printf '%s - %s Configure Done\n' "${_MP_NET}" "${_MP_VOLT}"
+        _MP_OK=$(( _MP_OK + 1 ))
+    else
+        _mp_err "${_MP_NET} - ${_MP_VOLT} FAILED (${_MP_RFAIL} command(s))"
+        _MP_BAD=$(( _MP_BAD + 1 ))
+    fi
+    _MP_NET=""; _MP_VOLT=""; _MP_RFAIL=0
+}
+
+_mp_apply() {
+    local name="$1" data="$2" line unit skipping=0
+    _mp_units_check || return 1
+    _MP_OK=0; _MP_BAD=0; _MP_SKIP=0; _MP_NET=""; _MP_RFAIL=0
+
+    _mp_info "multiphase margin '${name}' on unit(s): ${MP_UNITS}"
+    set -f                                  # the tables are argv, never globs
+    while IFS= read -r line; do
+        [ -z "${line}" ] && continue
+        case "${line}" in
+            '@ '*)
+                _mp_flush_rail
+                set -- ${line}              # @ <net> <volt>
+                _MP_NET="$2"; _MP_VOLT="$3"
+                case "${_MP_NET}" in
+                    SWB0_*) unit=0 ;;
+                    SWB1_*) unit=1 ;;
+                    *)      unit="?" ;;
+                esac
+                if _mp_want_unit "${unit}"; then
+                    skipping=0
+                else
+                    skipping=1; _MP_SKIP=$(( _MP_SKIP + 1 ))
+                    _MP_NET=""              # not selected: no line, no count
+                fi
+                ;;
+            i2c*)
+                [ "${skipping}" = "1" ] && continue
+                _mp_exec ${line} || _MP_RFAIL=$(( _MP_RFAIL + 1 ))
+                ;;
+        esac
+    done <<< "${data}"
+    _mp_flush_rail
+    set +f
+
+    echo ""
+    if [ "${_MP_BAD}" -eq 0 ]; then
+        _mp_ok "${name}: ${_MP_OK} rail(s) configured$([ "${_MP_SKIP}" -gt 0 ] && echo ", ${_MP_SKIP} skipped (other unit)")"
+    else
+        _mp_err "${name}: ${_MP_OK} ok, ${_MP_BAD} FAILED"
+        return 2
+    fi
+    return 0
+}
+
+# --- save --------------------------------------------------------------------
+# No per-rail mapping exists for this list, so it reports as one operation.
+_mp_save() {
+    local line bus unit fail=0 n=0
+    _mp_units_check || return 1
+    _mp_warn "STORE_USER_ALL writes NVM PERMANENTLY - a power cycle will not undo it"
+    _mp_info "multiphase save on unit(s): ${MP_UNITS}"
+
+    set -f
+    while IFS= read -r line; do
+        [ -z "${line}" ] && continue
+        bus="$(echo ${line} | awk '{print $4}')"
+        unit="$(_mp_bus_unit "${bus}")"
+        _mp_want_unit "${unit}" || continue
+        n=$(( n + 1 ))
+        _mp_exec ${line} || fail=$(( fail + 1 ))
+    done <<< "${MP_DATA_save}"
+    set +f
+
+    if [ "${fail}" -eq 0 ]; then
+        printf 'Multiphase Save All\n'
+        return 0
+    fi
+    _mp_err "multiphase save: ${fail} of ${n} command(s) failed - the rails may be PARTLY committed"
+    return 2
+}
+
+usage() {
+    cat <<USAGE
+blanton_multiphase_margin.sh - multiphase VRM margin (native i2c, 38 rails)
+
+  high3     every rail +3%
+  low3      every rail -3%
+  comboA    mixed high/low, set A
+  comboB    mixed high/low, set B
+  save      commit to NVM  -- PERMANENT, survives a power cycle
+
+  -u|--unit <0|1|all>   SWB0 (i2c-13/15) / SWB1 (i2c-14/16); default both
+  -d|--debug            print every i2c command
+  -n|--dry-run          print the commands only, touch nothing
+
+  Prints one line per rail:   SWB0_0V9_ANLG0 - 0.930V Configure Done
+  save has no per-rail mapping and prints:   Multiphase Save All
+
+  These are NOT the LTC2980s that margin.sh drives. Do not run both.
+USAGE
+}
+
+SUB="${1:-}"; shift 2>/dev/null
+while [ $# -gt 0 ]; do
+    case "$1" in
+        -u|--unit)
+            case "$2" in
+                all|ALL) MP_UNITS="0 1" ;;
+                *)       MP_UNITS="$(echo "$2" | tr ',' ' ')" ;;
+            esac
+            shift 2 ;;
+        -d|--debug)   DEBUG_MODE=1;  shift ;;
+        -n|--dry-run) MP_DRY_RUN=1;  shift ;;
+        -h|--help)    usage; exit 0 ;;
+        *) _mp_err "unknown option '$1'"; usage; exit 1 ;;
+    esac
+done
+
+case "${SUB}" in
+    high3)  _mp_apply high3  "${MP_DATA_high3}" ;;
+    low3)   _mp_apply low3   "${MP_DATA_low3}" ;;
+    comboA) _mp_apply comboA "${MP_DATA_comboA}" ;;
+    comboB) _mp_apply comboB "${MP_DATA_comboB}" ;;
+    save)   _mp_save ;;
+    -h|--help|"") usage ;;
+    *) _mp_err "unknown sub-command: ${SUB}"; usage; exit 1 ;;
+esac
diff --git a/src/Script_ABC_Blanton/Blanton_Script/blanton_traffic_linespeed.sh b/src/Script_ABC_Blanton/Blanton_Script/blanton_traffic_linespeed.sh
index 9946e98..e0bfa2c 100644
--- a/src/Script_ABC_Blanton/Blanton_Script/blanton_traffic_linespeed.sh
+++ b/src/Script_ABC_Blanton/Blanton_Script/blanton_traffic_linespeed.sh
@@ -6,7 +6,7 @@
 #   V0.1.0  2026-08-17  First version. Bash port of the three Tera Term macros
 #                       utils/traffic_loopback_vlan_setting.ttl (VLAN 30..137,
 #                       port pair cdN <-> cdN+32), utils/traffic_loopback_start.ttl
-#                       (tx 100 length=512 VLantag=<vid>) and
+#                       (tx <count> length=<len> VLantag=<vid>) and
 #                       utils/traffic_loopback_vlan_remove.ttl.
 #                       One DUT = two switch boards -> bcmcmd unit 0 and 1
 #                       (bcmcmd -n <unit>), default both.
@@ -90,6 +90,16 @@
 #                       With only one unit selected the summary reports
 #                       UNDECIDED (exit 3) instead of guessing.
 #                       TL_CE_ENABLE=0 restores the old cd-pairs-only behaviour.
+#   V0.7.0  2026-09-01  Change: tx bursts carry PatternRandom=yes and the defaults
+#                       become tx 200 length=324 (were 100 / 512).
+#                       Random payload keeps the bit pattern changing instead of
+#                       repeating, which is what makes a marginal lane show up;
+#                       a fixed pattern can sit on a benign sequence all run.
+#                       TL_TX_RANDOM=no forces the fixed pattern, "" leaves the
+#                       argument off entirely (pre-V0.7.0 wire format).
+#                       NOTE: counters scale with count x length, so totals from
+#                       before this build are not comparable - 200x324 moves
+#                       about 27% more bytes per burst than 100x512.
 #   V0.6.0  2026-08-28  Add: ce0 traffic is now SUSTAINED, not a single burst.
 #                       A cd pair keeps its packets circulating because they
 #                       flood to the partner port; ce0 has no partner and a
@@ -142,6 +152,8 @@
 #                             aliases: -tx | --tx
 #   -l|--length <n>           tx packet length     (default $TL_TX_LENGTH)
 #                             aliases: -length | --len
+#   -r|--random <yes|no>      tx PatternRandom     (default $TL_TX_RANDOM;
+#                             empty string omits the argument)
 #   -p|--ports  <list|all>    ps: port list ('all' = plain 'ps', every port)
 #   -T|--tolerance <n>        report: allowed |delta| in packets (default 0;
 #                             -T 1 absorbs the normal snapshot skew)
@@ -161,7 +173,8 @@
 #   -h|--help                 help
 #
 # Environment overrides:
-#   BCMCMD_CMD=bcmcmd   TL_UNITS="0 1"   TL_TX_COUNT=100   TL_TX_LENGTH=512
+#   BCMCMD_CMD=bcmcmd   TL_UNITS="0 1"   TL_TX_COUNT=200   TL_TX_LENGTH=324
+#   TL_TX_RANDOM=yes
 #   TL_PS_PORTS="1-24,40-96,..."         TL_TOLERANCE=0    TL_LOG_DIR=/tmp
 #   DEBUG_MODE=1
 #
@@ -173,8 +186,14 @@
 # === Config ==================================================================
 BCMCMD_CMD="${BCMCMD_CMD:-bcmcmd}"
 TL_UNITS="${TL_UNITS:-0 1}"          # one DUT = two switch boards (0 and 1)
-TL_TX_COUNT="${TL_TX_COUNT:-100}"
-TL_TX_LENGTH="${TL_TX_LENGTH:-512}"
+TL_TX_COUNT="${TL_TX_COUNT:-200}"
+TL_TX_LENGTH="${TL_TX_LENGTH:-324}"
+
+# PatternRandom=yes|no is appended to every tx burst. Random payload exercises
+# the SerDes with changing bit patterns instead of the repeating one a fixed
+# pattern produces, which is what makes a marginal lane show up.
+# Set to "" to leave the argument off entirely (pre-V0.7.0 behaviour).
+TL_TX_RANDOM="${TL_TX_RANDOM:-yes}"
 TL_DEFAULT_VLAN="${TL_DEFAULT_VLAN:-1}"
 TL_DEFAULT_VLAN_PBM="${TL_DEFAULT_VLAN_PBM:-cd}"
 
@@ -515,17 +534,23 @@ traffic_linespeed_start() {
     _tl_units_check || return 1
     _tl_is_uint "$TL_TX_COUNT"  || { _tl_err "tx count '$TL_TX_COUNT' is not a positive integer (-tx|-c <n>)"; return 1; }
     _tl_is_uint "$TL_TX_LENGTH" || { _tl_err "tx length '$TL_TX_LENGTH' is not a positive integer (-length|-l <n>)"; return 1; }
+    local rnd=""
+    case "$TL_TX_RANDOM" in
+        yes|no) rnd=" PatternRandom=$TL_TX_RANDOM" ;;
+        "")     rnd="" ;;
+        *)      _tl_err "PatternRandom '$TL_TX_RANDOM' must be yes, no or empty (-r|--random)"; return 1 ;;
+    esac
     local unit vid pa pb n fail
     for unit in $TL_UNITS; do
         n=0; fail=0
-        _tl_info "unit $unit: tx $TL_TX_COUNT length=$TL_TX_LENGTH per VLAN 30..137"
+        _tl_info "unit $unit: tx $TL_TX_COUNT length=$TL_TX_LENGTH${rnd} per VLAN 30..137"
         while read -r vid pa pb <&3; do
             [ -z "$vid" ] && continue
-            _tl_bcm_q "$unit" "tx $TL_TX_COUNT length=$TL_TX_LENGTH VLantag=$vid" || fail=$((fail+1))
+            _tl_bcm_q "$unit" "tx $TL_TX_COUNT length=$TL_TX_LENGTH VLantag=$vid${rnd}" || fail=$((fail+1))
             n=$((n+1))
         done 3<<< "$TL_PAIRS"
         if [ "$TL_CE_ENABLE" = "1" ]; then
-            _tl_bcm_q "$unit" "tx $TL_TX_COUNT length=$TL_TX_LENGTH VLantag=$TL_CE_VLAN" || fail=$((fail+1))
+            _tl_bcm_q "$unit" "tx $TL_TX_COUNT length=$TL_TX_LENGTH VLantag=$TL_CE_VLAN${rnd}" || fail=$((fail+1))
             n=$((n+1))
         fi
         if [ "$fail" -eq 0 ]; then
@@ -949,7 +974,7 @@ traffic_linespeed_run() {
 blanton_traffic_linespeed_help() {
     echo -e "\033[1mblanton_traffic_linespeed.sh - SWB loopback line-speed traffic (bcmcmd)\033[0m"
     echo ""
-    echo -e "  Units: \033[36m$TL_UNITS\033[0m   tx: \033[36m$TL_TX_COUNT pkt x ${TL_TX_LENGTH}B\033[0m"
+    echo -e "  Units: \033[36m$TL_UNITS\033[0m   tx: \033[36m$TL_TX_COUNT pkt x ${TL_TX_LENGTH}B\033[0m   PatternRandom: \033[36m${TL_TX_RANDOM:-（不加）}\033[0m"
     echo -e "  VLANs: 30..137 ($(_tl_pair_count) loopback pairs, cdN <-> cdN+32)"
     [ "$TL_CE_ENABLE" = "1" ] && \
         echo -e "  100G : VLAN \033[36m$TL_CE_VLAN\033[0m port \033[36m$TL_CE_PORT\033[0m  mode=\033[36m$TL_CE_MODE\033[0m (cross = unit0.$TL_CE_PORT <-> unit1.$TL_CE_PORT cabled)"
@@ -958,7 +983,7 @@ blanton_traffic_linespeed_help() {
     echo -e "  \033[33minit\033[0m     step 1  vlan remove 1 pbm=cd, vlan create/add each pair"
     echo -e "  \033[33mclear\033[0m    step 2  clear c"
     echo -e "  \033[33mshow\033[0m     step 3/6  show c  (run before and after traffic)"
-    echo -e "  \033[33mstart\033[0m    step 4  tx <count> length=<len> VLantag=<vid> per VLAN"
+    echo -e "  \033[33mstart\033[0m    step 4  tx <count> length=<len> VLantag=<vid> [PatternRandom=<yes|no>] per VLAN"
     echo -e "  \033[33mstop\033[0m     step 5  vlan remove <vid> pbm=<pair>  [--destroy also destroys]"
     [ "$TL_CE_ENABLE" = "1" ] && [ "$TL_CE_MIRROR" = "1" ] && \
         echo -e "           \033[33m^ also turns the $TL_CE_PORT mirror off -- without it the 100G loop keeps running\033[0m"
@@ -972,6 +997,7 @@ blanton_traffic_linespeed_help() {
     echo -e "  \033[33m-u|--unit\033[0m <0|1|all>   bcmcmd unit(s); 'all' = 0 1  (default: $TL_UNITS)"
     echo -e "  \033[33m-c|--count|-tx\033[0m <n>    tx packet count   (default $TL_TX_COUNT)"
     echo -e "  \033[33m-l|--length|-length\033[0m <n> tx packet length (default $TL_TX_LENGTH)"
+    echo -e "  \033[33m-r|--random\033[0m <yes|no>  tx PatternRandom (default $TL_TX_RANDOM; \"\" 完全不加)"
     echo -e "  \033[33m-p|--ports\033[0m <list>     ps port list, or 'all' for every port"
     echo -e "  \033[33m-T|--tolerance\033[0m <n>    report: allowed |delta| pkts (default $TL_TOLERANCE; -T 1 = snapshot skew)"
     echo -e "  \033[33m-a|--all\033[0m              report: kept for compatibility (all pairs are listed)"
@@ -995,7 +1021,8 @@ blanton_traffic_linespeed_help() {
     echo -e "  blanton_traffic_linespeed report -u 1 -q | grep -v PASS"
     echo -e "  blanton_traffic_linespeed report -f /tmp/showc_unit1_*.log -a"
     echo -e "  blanton_traffic_linespeed show -u 1 | grep -iE 'error|discard|drop'"
-    echo -e "  blanton_traffic_linespeed start -u 0 -tx 100 -length 512"
+    echo -e "  blanton_traffic_linespeed start -u 0 -tx 200 -length 324"
+    echo -e "  blanton_traffic_linespeed start -r no          # 固定樣式，不隨機"
     echo -e "  blanton_traffic_linespeed start -tx 100000 -length 9216 -d"
     echo -e "  blanton_traffic_linespeed stop --destroy"
     echo ""
@@ -1019,6 +1046,7 @@ blanton_traffic_linespeed() {
                 shift 2 ;;
             -c|--count|-tx|--tx)     TL_TX_COUNT="$2";  shift 2 ;;
             -l|-length|--length|--len) TL_TX_LENGTH="$2"; shift 2 ;;
+            -r|--random|-PatternRandom|--pattern-random) TL_TX_RANDOM="$2"; shift 2 ;;
             -p|--ports)   TL_PS_PORTS="$2";  shift 2 ;;
             -T|--tolerance) TL_TOLERANCE="$2"; shift 2 ;;
             -f|--file)    TL_REPORT_FILE="$2"; shift 2 ;;
diff --git a/tools/Multiphase_Netname b/tools/Multiphase_Netname
new file mode 100644
index 0000000..10b7d19
--- /dev/null
+++ b/tools/Multiphase_Netname
@@ -0,0 +1,40 @@
+SWB0_0V9_ANLG0
+SWB0_0V9_ANLG1
+SWB0_0V75_ANLG0
+SWB0_0V75_ANLG1
+SWB0_PHYTILE_P0
+SWB0_PHYTILE_P1
+SWB0_PHYTILE_P2
+SWB0_PHYTILE_P3
+SWB0_PHYTILE_P4
+SWB0_PHYTILE_P5
+SWB0_PHYTILE_P6
+SWB0_PHYTILE_P7
+SWB0_PVDD1V5_CNDR0
+SWB0_PVDD1V5_CNDR1
+SWB0_PVDDA_PHYT0
+SWB0_PVDDA_PHYT1
+SWB0_PVDDA_PHYT2
+SWB0_PVDDA_PHYT3
+SWB0_TH6_CORE
+
+
+SWB1_0V9_ANLG0
+SWB1_0V9_ANLG1
+SWB1_0V75_ANLG0
+SWB1_0V75_ANLG1
+SWB1_PHYTILE_P0
+SWB1_PHYTILE_P1
+SWB1_PHYTILE_P2
+SWB1_PHYTILE_P3
+SWB1_PHYTILE_P4
+SWB1_PHYTILE_P5
+SWB1_PHYTILE_P6
+SWB1_PHYTILE_P7
+SWB1_PVDD1V5_CNDR0
+SWB1_PVDD1V5_CNDR1
+SWB1_PVDDA_PHYT0
+SWB1_PVDDA_PHYT1
+SWB1_PVDDA_PHYT2
+SWB1_PVDDA_PHYT3
+SWB1_TH6_CORE
diff --git a/tools/Multiphase_Save.txt b/tools/Multiphase_Save.txt
new file mode 100644
index 0000000..61e172b
--- /dev/null
+++ b/tools/Multiphase_Save.txt
@@ -0,0 +1,48 @@
+i2cset -f -y 13 0x25 0x00 0
+i2cset -f -y 13 0x25 0x15
+i2cset -f -y 15 0x26 0x00 0
+i2cset -f -y 15 0x26 0x15
+i2cset -f -y 13 0x25 0x00 0
+i2cset -f -y 13 0x25 0x15
+i2cset -f -y 15 0x26 0x00 0
+i2cset -f -y 15 0x26 0x15
+i2cset -f -y 13 0x21 0x00 0
+i2cset -f -y 13 0x21 0x15
+i2cset -f -y 13 0x22 0x00 0
+i2cset -f -y 13 0x22 0x15
+i2cset -f -y 15 0x23 0x00 0
+i2cset -f -y 15 0x23 0x15
+i2cset -f -y 15 0x24 0x00 0
+i2cset -f -y 15 0x24 0x15
+i2cset -f -y 13 0x29 0x00 0
+i2cset -f -y 13 0x29 0x15
+i2cset -f -y 13 0x27 0x00 0
+i2cset -f -y 13 0x27 0x15
+i2cset -f -y 15 0x28 0x00 0
+i2cset -f -y 15 0x28 0x15
+i2cset -f -y 13 0x20 0x00 0
+i2cset -f -y 13 0x20 0x17
+i2cset -f -y 14 0x25 0x00 0
+i2cset -f -y 14 0x25 0x15
+i2cset -f -y 16 0x26 0x00 0
+i2cset -f -y 16 0x26 0x15
+i2cset -f -y 14 0x25 0x00 0
+i2cset -f -y 14 0x25 0x15
+i2cset -f -y 16 0x26 0x00 0
+i2cset -f -y 16 0x26 0x15
+i2cset -f -y 14 0x21 0x00 0
+i2cset -f -y 14 0x21 0x15
+i2cset -f -y 14 0x22 0x00 0
+i2cset -f -y 14 0x22 0x15
+i2cset -f -y 16 0x23 0x00 0
+i2cset -f -y 16 0x23 0x15
+i2cset -f -y 16 0x24 0x00 0
+i2cset -f -y 16 0x24 0x15
+i2cset -f -y 14 0x29 0x00 0
+i2cset -f -y 14 0x29 0x15
+i2cset -f -y 14 0x27 0x00 0
+i2cset -f -y 14 0x27 0x15
+i2cset -f -y 16 0x28 0x00 0
+i2cset -f -y 16 0x28 0x15
+i2cset -f -y 14 0x20 0x00 0
+i2cset -f -y 14 0x20 0x17
diff --git a/tools/Multiphase_comboA.txt b/tools/Multiphase_comboA.txt
new file mode 100644
index 0000000..70f623d
--- /dev/null
+++ b/tools/Multiphase_comboA.txt
@@ -0,0 +1,188 @@
+//0.930V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0x34 0x11
+//0.930V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0x34 0x11
+//0.725V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0x0A 0x06
+//1.545V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x91 0x20
+//1.545V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x49 0x10
+//0.745V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0x4C 0x06
+//0.745V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0x4C 0x06
+//0.885V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x62 0x01
+
+
+//0.930V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0x34 0x11
+//0.930V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0x34 0x11
+//0.725V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0x0A 0x06
+//1.545V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x91 0x20
+//1.545V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x49 0x10
+//0.745V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0x4C 0x06
+//0.745V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0x4C 0x06
+//0.885V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x62 0x01
diff --git a/tools/Multiphase_comboB.txt b/tools/Multiphase_comboB.txt
new file mode 100644
index 0000000..a250839
--- /dev/null
+++ b/tools/Multiphase_comboB.txt
@@ -0,0 +1,188 @@
+//0.870V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0xB4 0x0F
+//0.870V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0xB4 0x0F
+//0.775V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0xAA 0x06
+//1.455V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x51 0x1E
+//1.455V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x29 0x0F
+//0.695V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0xAC 0x05
+//0.695V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0xAC 0x05
+//0.753V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x2D 0x01
+
+
+//0.870V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0xB4 0x0F
+//0.870V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0xB4 0x0F
+//0.775V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0xAA 0x06
+//1.455V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x51 0x1E
+//1.455V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x29 0x0F
+//0.695V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0xAC 0x05
+//0.695V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0xAC 0x05
+//0.753V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x2D 0x01
diff --git a/tools/Multiphase_high3.txt b/tools/Multiphase_high3.txt
new file mode 100644
index 0000000..f6276f7
--- /dev/null
+++ b/tools/Multiphase_high3.txt
@@ -0,0 +1,188 @@
+//0.930V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0x34 0x11
+//0.930V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0x34 0x11
+//0.775V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0xAA 0x06
+//1.545V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x91 0x20
+//1.545V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x49 0x10
+//0.745V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0x4C 0x06
+//0.745V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0x4C 0x06
+//0.885V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x62 0x01
+
+
+//0.930V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x89 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0x34 0x11
+//0.930V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x89 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0x34 0x11
+//0.775V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x6A 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x6A 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x6A 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x52 0x0D
+//0.775V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x6A 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x6A 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0xAA 0x06
+//0.775V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D  0x52 0x0D
+//0.775V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x6A 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0xAA 0x06
+//1.545V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x91 0x20
+//1.545V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0x04 0x01
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x49 0x10
+//0.745V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x64 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0x4C 0x06
+//0.745V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x94 0x0C
+//0.745V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x64 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0x4C 0x06
+//0.885V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x62 0x01
diff --git a/tools/Multiphase_low3.txt b/tools/Multiphase_low3.txt
new file mode 100644
index 0000000..99c5b97
--- /dev/null
+++ b/tools/Multiphase_low3.txt
@@ -0,0 +1,188 @@
+//0.870V
+i2cset -f -y 13 0x25 0x00 0
+i2ctransfer -f -y 13 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x0D 0xB4 0x0F
+//0.870V
+i2cset -f -y 15 0x26 0x00 0
+i2ctransfer -f -y 15 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x0D 0xB4 0x0F
+//0.725V
+i2cset -f -y 13 0x25 0x00 1
+i2ctransfer -f -y 13 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 13 0x25 0x00 2
+i2ctransfer -f -y 13 w3@0x25 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 15 0x26 0x00 1
+i2ctransfer -f -y 15 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 15 0x26 0x00 2
+i2ctransfer -f -y 15 w3@0x26 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 13 0x21 0x00 0
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 13 0x21 0x00 1
+i2ctransfer -f -y 13 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 13 0x21 0x00 2
+i2ctransfer -f -y 13 w3@0x21 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 13 0x22 0x00 0
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 13 0x22 0x00 1
+i2ctransfer -f -y 13 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 13 0x22 0x00 2
+i2ctransfer -f -y 13 w3@0x22 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 15 0x23 0x00 0
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 15 0x23 0x00 1
+i2ctransfer -f -y 15 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 15 0x23 0x00 2
+i2ctransfer -f -y 15 w3@0x23 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 15 0x24 0x00 0
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 15 0x24 0x00 1
+i2ctransfer -f -y 15 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 15 0x24 0x00 2
+i2ctransfer -f -y 15 w3@0x24 0x1D 0x0A 0x06
+//1.455V
+i2cset -f -y 13 0x29 0x00 0
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x0D 0x51 0x1E
+//1.455V
+i2cset -f -y 13 0x29 0x00 1
+i2ctransfer -f -y 13 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 13 0x29 0x00 2
+i2ctransfer -f -y 13 w3@0x29 0x1D 0x29 0x0F
+//0.695V
+i2cset -f -y 13 0x27 0x00 0
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 13 0x27 0x00 1
+i2ctransfer -f -y 13 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 13 0x27 0x00 2
+i2ctransfer -f -y 13 w3@0x27 0x1D 0xAC 0x05
+//0.695V
+i2cset -f -y 15 0x28 0x00 0
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 15 0x28 0x00 1
+i2ctransfer -f -y 15 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 15 0x28 0x00 2
+i2ctransfer -f -y 15 w3@0x28 0x1D 0xAC 0x05
+//0.753V
+i2cset -f -y 13 0x20 0x00 0
+i2ctransfer -f -y 13 w3@0x20 0x21 0x2D 0x01
+
+
+//0.870V
+i2cset -f -y 14 0x25 0x00 0
+i2ctransfer -f -y 14 w3@0x25 0x21 0x7D 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x0D 0xB4 0x0F
+//0.870V
+i2cset -f -y 16 0x26 0x00 0
+i2ctransfer -f -y 16 w3@0x26 0x21 0x7D 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x0D 0xB4 0x0F
+//0.725V
+i2cset -f -y 14 0x25 0x00 1
+i2ctransfer -f -y 14 w3@0x25 0x21 0x60 0x00
+i2cset -f -y 14 0x25 0x00 2
+i2ctransfer -f -y 14 w3@0x25 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 16 0x26 0x00 1
+i2ctransfer -f -y 16 w3@0x26 0x21 0x60 0x00
+i2cset -f -y 16 0x26 0x00 2
+i2ctransfer -f -y 16 w3@0x26 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 14 0x21 0x00 0
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 14 0x21 0x00 1
+i2ctransfer -f -y 14 w3@0x21 0x21 0x60 0x00
+i2cset -f -y 14 0x21 0x00 2
+i2ctransfer -f -y 14 w3@0x21 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 14 0x22 0x00 0
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 14 0x22 0x00 1
+i2ctransfer -f -y 14 w3@0x22 0x21 0x60 0x00
+i2cset -f -y 14 0x22 0x00 2
+i2ctransfer -f -y 14 w3@0x22 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 16 0x23 0x00 0
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 16 0x23 0x00 1
+i2ctransfer -f -y 16 w3@0x23 0x21 0x60 0x00
+i2cset -f -y 16 0x23 0x00 2
+i2ctransfer -f -y 16 w3@0x23 0x1D 0x0A 0x06
+//0.725V
+i2cset -f -y 16 0x24 0x00 0
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x0D 0x12 0x0C
+//0.725V
+i2cset -f -y 16 0x24 0x00 1
+i2ctransfer -f -y 16 w3@0x24 0x21 0x60 0x00
+i2cset -f -y 16 0x24 0x00 2
+i2ctransfer -f -y 16 w3@0x24 0x1D 0x0A 0x06
+//1.455V
+i2cset -f -y 14 0x29 0x00 0
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x0D 0x51 0x1E
+//1.455V
+i2cset -f -y 14 0x29 0x00 1
+i2ctransfer -f -y 14 w3@0x29 0x21 0xF2 0x00
+i2cset -f -y 14 0x29 0x00 2
+i2ctransfer -f -y 14 w3@0x29 0x1D 0x29 0x0F
+//0.695V
+i2cset -f -y 14 0x27 0x00 0
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 14 0x27 0x00 1
+i2ctransfer -f -y 14 w3@0x27 0x21 0x5A 0x00
+i2cset -f -y 14 0x27 0x00 2
+i2ctransfer -f -y 14 w3@0x27 0x1D 0xAC 0x05
+//0.695V
+i2cset -f -y 16 0x28 0x00 0
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x0D 0x54 0x0B
+//0.695V
+i2cset -f -y 16 0x28 0x00 1
+i2ctransfer -f -y 16 w3@0x28 0x21 0x5A 0x00
+i2cset -f -y 16 0x28 0x00 2
+i2ctransfer -f -y 16 w3@0x28 0x1D 0xAC 0x05
+//0.753V
+i2cset -f -y 14 0x20 0x00 0
+i2ctransfer -f -y 14 w3@0x20 0x21 0x2D 0x01