diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/Ref/margin_command_trace.md b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/Ref/margin_command_trace.md new file mode 100644 index 0000000..282a519 --- /dev/null +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/Ref/margin_command_trace.md @@ -0,0 +1,2433 @@ +# margin.sh 實際下線指令追蹤 (Command Trace) + +對象:`LTC2980_Margin_Script/margin.sh` v2.6.0 +產生日期:2026-08-18 +用途:紀錄每個 margin 指令在 I2C / PMBus 線上真正下了什麼,方便對照 log、 + 用 `i2cset/i2cget` 或 `cb_pmbus_*` 手動重現、以及 debug NACK。 + +--- + +## 0. 兩條 transport + +`.conf` 內的 `TRANSPORT` 決定線上操作走哪一條,`margin.sh` 上層邏輯 +(PAGE、LINEAR16 x8192、VNOM margin 計算)兩條完全相同。 + +| TRANSPORT | 適用 setting | 線上操作 | 位址來源 | +|---|---|---|---| +| `""` / `i2c`(預設) | `Blanton_CB_CONN13.conf` | `i2cset` / `i2cget`(CPU 原生 bus 4) | `CHIPS="bus:addr"` 兩個欄位都用 | +| `swb` | `Blanton_SWB{0,1}_CONN{13..16}.conf` | `cb_pmbus_write` / `cb_pmbus_read`(CB FPGA F3 I2C master) | `CHIPS` 只用 addr;channel 來自 `CB_I2C_CH` | + +SWB 的 FPGA I2C channel 對應(寫在各 `.conf` 的 `CB_I2C_CH`): + +| CB F3 channel | 板子 / CONN | +|---|---| +| Ch6 | SWB0 CONN13 / CONN14 | +| Ch8 | SWB0 CONN15 / CONN16 | +| Ch7 | SWB1 CONN13 / CONN14 | +| Ch9 | SWB1 CONN15 / CONN16 | + +--- + +## 1. 用到的 PMBus 暫存器 + +| Reg | 名稱 | margin.sh 用途 | +|---|---|---| +| `0x00` | PAGE | 選 LTC2977 內部第幾個 channel(0x00~0x07) | +| `0x01` | OPERATION | `high=0xa8` / `low=0x98` / `nominal=0x80` / `off=0x00` | +| `0x02` | ON_OFF_CONFIG | 寫 `0x1a` 清掉 use_control,讓 OPERATION 能開 channel、servo DAC 才會 soft-connect(`MARGIN_AUTO_ENABLE=1`) | +| `0x15` | STORE_USER_ALL | `margin_save`(寫 NVM,測試中不要下) | +| `0x25` | VOUT_MARGIN_HIGH | `Vnom x (1 + change/100)` | +| `0x26` | VOUT_MARGIN_LOW | `Vnom x (1 - change/100)` | +| `0x40` | VOUT_OV_FAULT_LIMIT | `Vnom x (1 + (change+2)/100)` | +| `0x44` | VOUT_UV_FAULT_LIMIT | `Vnom x (1 - (change+2)/100)` | +| `0x8b` | READ_VOUT | `margin_status` / 讀回驗證 | + +LINEAR16 換算(LTC2977 固定 exponent = -13): + +``` +raw = int(V x 8192) # 寫入:_dec_to_lin16,低位元組先送 +V = raw / 8192.0 # 讀出:_lin16_to_dec +``` + +注意:`i2cset ... w` 這一層 margin.sh 傳的是**十進位**的 `$word`; +`margin_debug on` 印出來的 `[DEBG]` 行是同一個值的 hex 表示。 + +--- + +## 2. `margin_init Blanton_CB_CONN13` + +**不下任何 I2C 指令。** 只做: + +1. `source settings/Blanton_CB_CONN13.conf` +2. `TRANSPORT=""` -> 收斂成 `i2c`,所以不載入 `blanton_cb_i2c.sh`、不碰 FPGA +3. `CHIP_PRE_CMD` / `CHIP_POST_CMD` 都是空字串 -> 沒有 mux 前後置命令 +4. 開 log(`logs/margin_YYYYmmdd_HHMMSS.log` + `_detail.log`) + +> 參數不含 `.conf`。打成 `margin_init Blanton_CB_CONN13.conf` 會去找 +> `settings/Blanton_CB_CONN13.conf.conf` 並報 `Setting file not found`。 + +SWB setting 則相反,`margin_init Blanton_SWB0_CONN13` 會下這些: + +``` +# 1) 載入後端 blanton_fpga_pcimem.sh + blanton_cb_i2c.sh(在上一層 Blanton_Script/) +# 2) _swb_setup: 把該 channel 的 I2C master 設好並探測 +cb_i2c_init 6 0x88 0x00 # prescale 100kHz + MOD_EN + # 等價 cb_fpga 3 0x3C8 0x00 / 0x3C0 0x88 / 0x3C4 0x00 / 0x3C8 0x80 +cb_pmbus_read 6 0x5C 0x00 1 # probe LTC2977[0] 是否 ACK +cb_pmbus_read 6 0x5E 0x00 1 # probe LTC2977[1] 是否 ACK +# 之後 CB_I2C_AUTO_INIT=0(MARGIN_SWB_AUTO_INIT),每筆 transfer 不再重複 init +``` + +--- + +## 3. `margin_status`(Blanton_CB_CONN13) + +每個 channel 兩條:寫 PAGE、讀 READ_VOUT。CH0~7 -> `0x5C`,CH8~15 -> `0x5E`,bus 固定 4。 + +```bash +i2cset -y 4 0x5C 0x00 0x00 b # PAGE = 0x00 (CH0 V5P0_ALW) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5C 0x00 0x01 b # PAGE = 0x01 (CH1 V3P3_ALW) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5C 0x00 0x02 b # PAGE = 0x02 (CH2 PWR_VDD_MISC_ALW) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5C 0x00 0x03 b # PAGE = 0x03 (CH3 V1P8_ALW) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5C 0x00 0x04 b # PAGE = 0x04 (CH4 PWR_APU_VDDIO_SUS) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5C 0x00 0x05 b # PAGE = 0x05 (CH5 PWR_VDD_MISC_RUN) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5C 0x00 0x06 b # PAGE = 0x06 (CH6 PWR_APU_VDD_MEM_RUN) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5C 0x00 0x07 b # PAGE = 0x07 (CH7 V0P8_PHY2_DVDD) +i2cget -y 4 0x5C 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x00 b # PAGE = 0x00 (CH8 V0P8_AVDD) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x01 b # PAGE = 0x01 (CH9 V0P8_PHY) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x02 b # PAGE = 0x02 (CH10 V1P8_FPGA) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x03 b # PAGE = 0x03 (CH11 V2P5_FPGA) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x04 b # PAGE = 0x04 (CH12 V1P1_FPGA) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x05 b # PAGE = 0x05 (CH13 P5V_STBY) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x06 b # PAGE = 0x06 (CH14 P3V3_STBY) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +i2cset -y 4 0x5E 0x00 0x07 b # PAGE = 0x07 (CH15 V0P8_PHY2_AVDD) +i2cget -y 4 0x5E 0x8b w # READ_VOUT +``` + +SWB 等價寫法(以 SWB0_CONN13,Ch6 為例): + +```bash +cb_pmbus_write 6 0x5C 0x00 0x00 # PAGE = 0 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +... # page 0x01..0x07,再換 0x5E 重複 +``` + +--- + +## 4. `margin_apply_profile profiles/combo_high3.conf` + +profile 內容:16 個 channel 全部 `high:3`(margin high +3%,OV/UV 再外擴 2%)。 + +每個 channel 的順序固定為 +`margin_set_value`(PAGE + 4 個 word 寫入)-> +`margin_operation`(PAGE + ON_OFF_CONFIG + OPERATION + sleep)-> +`margin_read_vout`(PAGE + READ_VOUT)。 + +合計 **160 條 i2c 指令 + 16 次 `sleep 0.3`**。 + +```bash +# ---- CH0 V5P0_ALW Vnom=5.0 chip=0x5C page=0x00 ---- +i2cset -y 4 0x5C 0x00 0x00 b +i2cset -y 4 0x5C 0x25 42188 w # VOUT_MARGIN_HIGH 0xa4cc -> 5.1499 V +i2cset -y 4 0x5C 0x26 39731 w # VOUT_MARGIN_LOW 0x9b33 -> 4.8500 V +i2cset -y 4 0x5C 0x40 43008 w # VOUT_OV_FAULT_LIMIT 0xa800 -> 5.2500 V +i2cset -y 4 0x5C 0x44 38912 w # VOUT_UV_FAULT_LIMIT 0x9800 -> 4.7500 V +i2cset -y 4 0x5C 0x00 0x00 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x00 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH1 V3P3_ALW Vnom=3.3 chip=0x5C page=0x01 ---- +i2cset -y 4 0x5C 0x00 0x01 b +i2cset -y 4 0x5C 0x25 27844 w # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +i2cset -y 4 0x5C 0x26 26222 w # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +i2cset -y 4 0x5C 0x40 28385 w # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +i2cset -y 4 0x5C 0x44 25681 w # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +i2cset -y 4 0x5C 0x00 0x01 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x01 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH2 PWR_VDD_MISC_ALW Vnom=0.75 chip=0x5C page=0x02 ---- +i2cset -y 4 0x5C 0x00 0x02 b +i2cset -y 4 0x5C 0x25 6328 w # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +i2cset -y 4 0x5C 0x26 5959 w # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +i2cset -y 4 0x5C 0x40 6451 w # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +i2cset -y 4 0x5C 0x44 5836 w # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +i2cset -y 4 0x5C 0x00 0x02 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x02 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH3 V1P8_ALW Vnom=1.8 chip=0x5C page=0x03 ---- +i2cset -y 4 0x5C 0x00 0x03 b +i2cset -y 4 0x5C 0x25 15187 w # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +i2cset -y 4 0x5C 0x26 14303 w # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +i2cset -y 4 0x5C 0x40 15482 w # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +i2cset -y 4 0x5C 0x44 14008 w # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +i2cset -y 4 0x5C 0x00 0x03 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x03 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH4 PWR_APU_VDDIO_SUS Vnom=1.1 chip=0x5C page=0x04 ---- +i2cset -y 4 0x5C 0x00 0x04 b +i2cset -y 4 0x5C 0x25 9281 w # VOUT_MARGIN_HIGH 0x2441 -> 1.1329 V +i2cset -y 4 0x5C 0x26 8740 w # VOUT_MARGIN_LOW 0x2224 -> 1.0669 V +i2cset -y 4 0x5C 0x40 9461 w # VOUT_OV_FAULT_LIMIT 0x24f5 -> 1.1549 V +i2cset -y 4 0x5C 0x44 8560 w # VOUT_UV_FAULT_LIMIT 0x2170 -> 1.0449 V +i2cset -y 4 0x5C 0x00 0x04 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x04 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH5 PWR_VDD_MISC_RUN Vnom=0.75 chip=0x5C page=0x05 ---- +i2cset -y 4 0x5C 0x00 0x05 b +i2cset -y 4 0x5C 0x25 6328 w # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +i2cset -y 4 0x5C 0x26 5959 w # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +i2cset -y 4 0x5C 0x40 6451 w # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +i2cset -y 4 0x5C 0x44 5836 w # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +i2cset -y 4 0x5C 0x00 0x05 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x05 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH6 PWR_APU_VDD_MEM_RUN Vnom=0.78 chip=0x5C page=0x06 ---- +i2cset -y 4 0x5C 0x00 0x06 b +i2cset -y 4 0x5C 0x25 6581 w # VOUT_MARGIN_HIGH 0x19b5 -> 0.8033 V +i2cset -y 4 0x5C 0x26 6198 w # VOUT_MARGIN_LOW 0x1836 -> 0.7566 V +i2cset -y 4 0x5C 0x40 6709 w # VOUT_OV_FAULT_LIMIT 0x1a35 -> 0.8190 V +i2cset -y 4 0x5C 0x44 6070 w # VOUT_UV_FAULT_LIMIT 0x17b6 -> 0.7410 V +i2cset -y 4 0x5C 0x00 0x06 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x06 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH7 V0P8_PHY2_DVDD Vnom=0.8 chip=0x5C page=0x07 ---- +i2cset -y 4 0x5C 0x00 0x07 b +i2cset -y 4 0x5C 0x25 6750 w # VOUT_MARGIN_HIGH 0x1a5e -> 0.8240 V +i2cset -y 4 0x5C 0x26 6356 w # VOUT_MARGIN_LOW 0x18d4 -> 0.7759 V +i2cset -y 4 0x5C 0x40 6881 w # VOUT_OV_FAULT_LIMIT 0x1ae1 -> 0.8400 V +i2cset -y 4 0x5C 0x44 6225 w # VOUT_UV_FAULT_LIMIT 0x1851 -> 0.7599 V +i2cset -y 4 0x5C 0x00 0x07 b +i2cset -y 4 0x5C 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5C 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5C 0x00 0x07 b +i2cget -y 4 0x5C 0x8b w # READ_VOUT read-back + +# ---- CH8 V0P8_AVDD Vnom=0.8 chip=0x5E page=0x00 ---- +i2cset -y 4 0x5E 0x00 0x00 b +i2cset -y 4 0x5E 0x25 6750 w # VOUT_MARGIN_HIGH 0x1a5e -> 0.8240 V +i2cset -y 4 0x5E 0x26 6356 w # VOUT_MARGIN_LOW 0x18d4 -> 0.7759 V +i2cset -y 4 0x5E 0x40 6881 w # VOUT_OV_FAULT_LIMIT 0x1ae1 -> 0.8400 V +i2cset -y 4 0x5E 0x44 6225 w # VOUT_UV_FAULT_LIMIT 0x1851 -> 0.7599 V +i2cset -y 4 0x5E 0x00 0x00 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x00 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back + +# ---- CH9 V0P8_PHY Vnom=0.8 chip=0x5E page=0x01 ---- +i2cset -y 4 0x5E 0x00 0x01 b +i2cset -y 4 0x5E 0x25 6750 w # VOUT_MARGIN_HIGH 0x1a5e -> 0.8240 V +i2cset -y 4 0x5E 0x26 6356 w # VOUT_MARGIN_LOW 0x18d4 -> 0.7759 V +i2cset -y 4 0x5E 0x40 6881 w # VOUT_OV_FAULT_LIMIT 0x1ae1 -> 0.8400 V +i2cset -y 4 0x5E 0x44 6225 w # VOUT_UV_FAULT_LIMIT 0x1851 -> 0.7599 V +i2cset -y 4 0x5E 0x00 0x01 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x01 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back + +# ---- CH10 V1P8_FPGA Vnom=1.8 chip=0x5E page=0x02 ---- +i2cset -y 4 0x5E 0x00 0x02 b +i2cset -y 4 0x5E 0x25 15187 w # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +i2cset -y 4 0x5E 0x26 14303 w # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +i2cset -y 4 0x5E 0x40 15482 w # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +i2cset -y 4 0x5E 0x44 14008 w # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +i2cset -y 4 0x5E 0x00 0x02 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x02 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back + +# ---- CH11 V2P5_FPGA Vnom=2.5 chip=0x5E page=0x03 ---- +i2cset -y 4 0x5E 0x00 0x03 b +i2cset -y 4 0x5E 0x25 21094 w # VOUT_MARGIN_HIGH 0x5266 -> 2.5750 V +i2cset -y 4 0x5E 0x26 19865 w # VOUT_MARGIN_LOW 0x4d99 -> 2.4249 V +i2cset -y 4 0x5E 0x40 21504 w # VOUT_OV_FAULT_LIMIT 0x5400 -> 2.6250 V +i2cset -y 4 0x5E 0x44 19456 w # VOUT_UV_FAULT_LIMIT 0x4c00 -> 2.3750 V +i2cset -y 4 0x5E 0x00 0x03 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x03 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back + +# ---- CH12 V1P1_FPGA Vnom=1.1 chip=0x5E page=0x04 ---- +i2cset -y 4 0x5E 0x00 0x04 b +i2cset -y 4 0x5E 0x25 9281 w # VOUT_MARGIN_HIGH 0x2441 -> 1.1329 V +i2cset -y 4 0x5E 0x26 8740 w # VOUT_MARGIN_LOW 0x2224 -> 1.0669 V +i2cset -y 4 0x5E 0x40 9461 w # VOUT_OV_FAULT_LIMIT 0x24f5 -> 1.1549 V +i2cset -y 4 0x5E 0x44 8560 w # VOUT_UV_FAULT_LIMIT 0x2170 -> 1.0449 V +i2cset -y 4 0x5E 0x00 0x04 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x04 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back + +# ---- CH13 P5V_STBY Vnom=5.0 chip=0x5E page=0x05 ---- +i2cset -y 4 0x5E 0x00 0x05 b +i2cset -y 4 0x5E 0x25 42188 w # VOUT_MARGIN_HIGH 0xa4cc -> 5.1499 V +i2cset -y 4 0x5E 0x26 39731 w # VOUT_MARGIN_LOW 0x9b33 -> 4.8500 V +i2cset -y 4 0x5E 0x40 43008 w # VOUT_OV_FAULT_LIMIT 0xa800 -> 5.2500 V +i2cset -y 4 0x5E 0x44 38912 w # VOUT_UV_FAULT_LIMIT 0x9800 -> 4.7500 V +i2cset -y 4 0x5E 0x00 0x05 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x05 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back + +# ---- CH14 P3V3_STBY Vnom=3.3 chip=0x5E page=0x06 ---- +i2cset -y 4 0x5E 0x00 0x06 b +i2cset -y 4 0x5E 0x25 27844 w # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +i2cset -y 4 0x5E 0x26 26222 w # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +i2cset -y 4 0x5E 0x40 28385 w # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +i2cset -y 4 0x5E 0x44 25681 w # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +i2cset -y 4 0x5E 0x00 0x06 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x06 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back + +# ---- CH15 V0P8_PHY2_AVDD Vnom=0.8 chip=0x5E page=0x07 ---- +i2cset -y 4 0x5E 0x00 0x07 b +i2cset -y 4 0x5E 0x25 6750 w # VOUT_MARGIN_HIGH 0x1a5e -> 0.8240 V +i2cset -y 4 0x5E 0x26 6356 w # VOUT_MARGIN_LOW 0x18d4 -> 0.7759 V +i2cset -y 4 0x5E 0x40 6881 w # VOUT_OV_FAULT_LIMIT 0x1ae1 -> 0.8400 V +i2cset -y 4 0x5E 0x44 6225 w # VOUT_UV_FAULT_LIMIT 0x1851 -> 0.7599 V +i2cset -y 4 0x5E 0x00 0x07 b +i2cset -y 4 0x5E 0x02 0x1a b # ON_OFF_CONFIG: clear use_control +i2cset -y 4 0x5E 0x01 0xa8 b # OPERATION = margin high (ignore fault) +sleep 0.3 # MARGIN_SETTLE +i2cset -y 4 0x5E 0x00 0x07 b +i2cget -y 4 0x5E 0x8b w # READ_VOUT read-back +``` + +### 為什麼每個 channel 會重複寫 3 次 PAGE + +`margin_set` 底下三個函式(`margin_set_value` / `margin_operation` / `margin_read_vout`) +各自都會 `_get_chip` + `_open_page`,因為它們也能被單獨呼叫。PAGE 重寫是無害的, +只是多 2 條指令;PRE/POST 命令則有 `_PRE_SCOPE` 保護,整個 profile 只會跑一次。 + +--- + +## 5. SWB 對照:同一件事在 FPGA I2C 上長什麼樣 + +`margin.sh` 的 swb 分支只是把 wire op 換掉,順序完全一樣: + +| margin.sh 內部 | i2c (CB) | swb (SWB via CB FPGA) | +|---|---|---| +| `_open_page 0x03` | `i2cset -y 4 0x5C 0x00 0x03 b` | `cb_pmbus_write 6 0x5C 0x00 0x03` | +| `_i2c_write_word 0x25 0x53 0x3b` | `i2cset -y 4 0x5C 0x25 15187 w` | `cb_pmbus_write 6 0x5C 0x25 0x53 0x3b` | +| `_i2c_write_byte 0x01 0xa8` | `i2cset -y 4 0x5C 0x01 0xa8 b` | `cb_pmbus_write 6 0x5C 0x01 0xa8` | +| `_i2c_read_word 0x8b` | `i2cget -y 4 0x5C 0x8b w` | `cb_pmbus_read 6 0x5C 0x8b 2` | + +每一條 `cb_pmbus_*` 底下又是一串 CB FPGA F3 的暫存器操作(OpenCores I2C master, +channel base = `0x300 + ch*0x20`,讀取用 Repeated START): + +``` +TX (+0x0C) <= slave<<1 ; CMD (+0x10) <= 0x90 (STA|WR) ; poll STAT TIP +TX (+0x0C) <= command code ; CMD (+0x10) <= 0x10 (WR, 不送 STOP) +TX (+0x0C) <= slave<<1|1 ; CMD (+0x10) <= 0x90 (Repeated START) +CMD (+0x10) <= 0x20 (RD) ; RX (+0x0C) -> byte0 +CMD (+0x10) <= 0x68 (RD|NACK|STO) ; RX (+0x0C) -> byte1 +``` + +想看到最底層的 `pcimem` 指令:`MARGIN_SWB_PCIMEM_DEBUG=1`(或直接 `fpga_debug on`)。 +注意 `blanton_fpga_pcimem.sh` 的 debug 旗標與 margin.sh 同名 `DEBUG_MODE`, +所以 margin.sh 用 `_swb_call` 在呼叫期間暫時關掉,避免 `margin_debug on` 被洗版。 + +SWB debug 指令(margin.sh v2.6.0 新增,皆為 `blanton_cb_i2c.sh` 的薄包裝): + +| 指令 | 實際動作 | +|---|---| +| `margin_swb_info` | 印出 TRANSPORT / CB_I2C_CH / channel base / 位址 / wire op 格式 | +| `margin_swb_probe` | 對 `CHIPS` 每顆下 `cb_pmbus_read 0x00 1` 看 ACK | +| `margin_swb_scan` | `cb_i2c_scan `(掃 0x08~0x77) | +| `margin_swb_reset` | `cb_i2c_reset `(LCL_RST=0xD)+ `cb_i2c_init` | +| `margin_swb_sem [status\|acquire\|release]` | `cb_i2c_sem ...` | + +--- + +## 6. 已知待確認事項 + +- `settings/Blanton_SWB0_CONN13.conf` 的第二顆是 `0:0x5E`,而 + `Blanton_SWB0_CONN14.conf` 的第一顆也是 `0:0x5E`。兩個 CONN 現在同在 Ch6, + 位址相撞。對照 SWB1 的規律(CONN13=`0x5C/0x5D`、CONN14=`0x5E/0x5F`), + SWB0_CONN13 第二顆推測應為 `0:0x5D` — **尚未修改,待硬體確認**。 +- `margin_save` 走 `0x15` + data byte(`i2cset ... 0x15 0x00 b`)。PMBus 規範 + STORE_USER_ALL 是 send-byte;CB 上實測可用故保留原樣,swb 路徑沿用同一寫法。 + +--- + +## 7. SWB 逐板指令展開(cb_i2c / cb_pmbus) + +以下八組是 `TRANSPORT="swb"` 的 setting,線上操作全部走 CB FPGA F3 I2C master +(`blanton_cb_i2c.sh`),不使用 `i2cset/i2cget`。每組都是 +`margin_init` -> `margin_status` -> `margin_apply_profile profiles/combo_high3.conf`。 + +`margin_init` 的參數同樣不含 `.conf`(例:`margin_init Blanton_SWB0_CONN13`)。 + +### 7.1 Blanton_SWB0_CONN13 (CB F3 Ch6) + +> 注意:本 conf 第二顆是 `0x5E`,與 `Blanton_SWB0_CONN14` 第一顆 `0x5E` 在同一條 Ch6 上相撞 +>(對照 SWB1 規律應為 `0x5D`),尚未修改。下列 `0x5E` 的指令目前其實會打到 CONN14 的第一顆。 + + +LTC2977:`0x5C` = CH0~CH7,`0x5E` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB0_CONN13` + +```bash +cb_i2c_init 6 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 6 0x5C 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 6 0x5E 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 6 0x5C 0x00 0x00 # PAGE = 0x00 (CH0 P0V75_DVDD_47, Vnom=0.75) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5C 0x00 0x01 # PAGE = 0x01 (CH1 P0V75_AVDD_47, Vnom=0.75) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5C 0x00 0x02 # PAGE = 0x02 (CH2 P1V5_AVDD_47, Vnom=1.5) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5C 0x00 0x03 # PAGE = 0x03 (CH3 P0V9_AVDD_47, Vnom=0.9) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5C 0x00 0x04 # PAGE = 0x04 (CH4 P1V8_1, Vnom=1.8) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5C 0x00 0x05 # PAGE = 0x05 (CH5 PVDD3_3V_SYNTH_LDO_A3, Vnom=3.3) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5C 0x00 0x06 # PAGE = 0x06 (CH6 PVDD3_3V_SYNTH_LDO_B1, Vnom=3.3) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5C 0x00 0x07 # PAGE = 0x07 (CH7 P1V8_3, Vnom=1.8) +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x00 # PAGE = 0x00 (CH8 P1V8_DVDDIO_3, Vnom=1.8) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x01 # PAGE = 0x01 (CH9 P0V75_DVDD_39, Vnom=0.75) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x02 # PAGE = 0x02 (CH10 P0V75_AVDD_39, Vnom=0.75) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x03 # PAGE = 0x03 (CH11 P1V5_AVDD_39, Vnom=1.5) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x04 # PAGE = 0x04 (CH12 P0V9_AVDD_39, Vnom=0.9) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x05 # PAGE = 0x05 (CH13 PVDD1V5_2, Vnom=1.5) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x06 # PAGE = 0x06 (CH14 PVDD1V8_DUT, Vnom=1.8) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x07 # PAGE = 0x07 (CH15 PVDD_MDIO, Vnom=1.2) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 P0V75_DVDD_47 Vnom=0.75 chip=0x5C page=0x00 ---- +cb_pmbus_write 6 0x5C 0x00 0x00 +cb_pmbus_write 6 0x5C 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 6 0x5C 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 6 0x5C 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 6 0x5C 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 6 0x5C 0x00 0x00 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x00 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P0V75_AVDD_47 Vnom=0.75 chip=0x5C page=0x01 ---- +cb_pmbus_write 6 0x5C 0x00 0x01 +cb_pmbus_write 6 0x5C 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 6 0x5C 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 6 0x5C 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 6 0x5C 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 6 0x5C 0x00 0x01 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x01 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH2 P1V5_AVDD_47 Vnom=1.5 chip=0x5C page=0x02 ---- +cb_pmbus_write 6 0x5C 0x00 0x02 +cb_pmbus_write 6 0x5C 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 6 0x5C 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 6 0x5C 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 6 0x5C 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 6 0x5C 0x00 0x02 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x02 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH3 P0V9_AVDD_47 Vnom=0.9 chip=0x5C page=0x03 ---- +cb_pmbus_write 6 0x5C 0x00 0x03 +cb_pmbus_write 6 0x5C 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 6 0x5C 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 6 0x5C 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 6 0x5C 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 6 0x5C 0x00 0x03 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x03 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH4 P1V8_1 Vnom=1.8 chip=0x5C page=0x04 ---- +cb_pmbus_write 6 0x5C 0x00 0x04 +cb_pmbus_write 6 0x5C 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 6 0x5C 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 6 0x5C 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 6 0x5C 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 6 0x5C 0x00 0x04 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x04 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH5 PVDD3_3V_SYNTH_LDO_A3 Vnom=3.3 chip=0x5C page=0x05 ---- +cb_pmbus_write 6 0x5C 0x00 0x05 +cb_pmbus_write 6 0x5C 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 6 0x5C 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 6 0x5C 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 6 0x5C 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 6 0x5C 0x00 0x05 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x05 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH6 PVDD3_3V_SYNTH_LDO_B1 Vnom=3.3 chip=0x5C page=0x06 ---- +cb_pmbus_write 6 0x5C 0x00 0x06 +cb_pmbus_write 6 0x5C 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 6 0x5C 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 6 0x5C 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 6 0x5C 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 6 0x5C 0x00 0x06 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x06 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH7 P1V8_3 Vnom=1.8 chip=0x5C page=0x07 ---- +cb_pmbus_write 6 0x5C 0x00 0x07 +cb_pmbus_write 6 0x5C 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 6 0x5C 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 6 0x5C 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 6 0x5C 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 6 0x5C 0x00 0x07 +cb_pmbus_write 6 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5C 0x00 0x07 +cb_pmbus_read 6 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH8 P1V8_DVDDIO_3 Vnom=1.8 chip=0x5E page=0x00 ---- +cb_pmbus_write 6 0x5E 0x00 0x00 +cb_pmbus_write 6 0x5E 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 6 0x5E 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 6 0x5E 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 6 0x5E 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 6 0x5E 0x00 0x00 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x00 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH9 P0V75_DVDD_39 Vnom=0.75 chip=0x5E page=0x01 ---- +cb_pmbus_write 6 0x5E 0x00 0x01 +cb_pmbus_write 6 0x5E 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 6 0x5E 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 6 0x5E 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 6 0x5E 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 6 0x5E 0x00 0x01 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x01 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH10 P0V75_AVDD_39 Vnom=0.75 chip=0x5E page=0x02 ---- +cb_pmbus_write 6 0x5E 0x00 0x02 +cb_pmbus_write 6 0x5E 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 6 0x5E 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 6 0x5E 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 6 0x5E 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 6 0x5E 0x00 0x02 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x02 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH11 P1V5_AVDD_39 Vnom=1.5 chip=0x5E page=0x03 ---- +cb_pmbus_write 6 0x5E 0x00 0x03 +cb_pmbus_write 6 0x5E 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 6 0x5E 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 6 0x5E 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 6 0x5E 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 6 0x5E 0x00 0x03 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x03 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH12 P0V9_AVDD_39 Vnom=0.9 chip=0x5E page=0x04 ---- +cb_pmbus_write 6 0x5E 0x00 0x04 +cb_pmbus_write 6 0x5E 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 6 0x5E 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 6 0x5E 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 6 0x5E 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 6 0x5E 0x00 0x04 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x04 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH13 PVDD1V5_2 Vnom=1.5 chip=0x5E page=0x05 ---- +cb_pmbus_write 6 0x5E 0x00 0x05 +cb_pmbus_write 6 0x5E 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 6 0x5E 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 6 0x5E 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 6 0x5E 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 6 0x5E 0x00 0x05 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x05 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH14 PVDD1V8_DUT Vnom=1.8 chip=0x5E page=0x06 ---- +cb_pmbus_write 6 0x5E 0x00 0x06 +cb_pmbus_write 6 0x5E 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 6 0x5E 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 6 0x5E 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 6 0x5E 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 6 0x5E 0x00 0x06 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x06 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH15 PVDD_MDIO Vnom=1.2 chip=0x5E page=0x07 ---- +cb_pmbus_write 6 0x5E 0x00 0x07 +cb_pmbus_write 6 0x5E 0x25 0x8d 0x27 # VOUT_MARGIN_HIGH 0x278d -> 1.2360 V +cb_pmbus_write 6 0x5E 0x26 0x3f 0x25 # VOUT_MARGIN_LOW 0x253f -> 1.1639 V +cb_pmbus_write 6 0x5E 0x40 0x51 0x28 # VOUT_OV_FAULT_LIMIT 0x2851 -> 1.2599 V +cb_pmbus_write 6 0x5E 0x44 0x7a 0x24 # VOUT_UV_FAULT_LIMIT 0x247a -> 1.1399 V +cb_pmbus_write 6 0x5E 0x00 0x07 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x07 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +``` + +### 7.2 Blanton_SWB0_CONN14 (CB F3 Ch6) + +> 注意:第一顆 `0x5E` 與 `Blanton_SWB0_CONN13` 第二顆 `0x5E` 在同一條 Ch6 上相撞,待硬體確認。 + + +LTC2977:`0x5E` = CH0~CH7,`0x5F` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB0_CONN14` + +```bash +cb_i2c_init 6 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 6 0x5E 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 6 0x5F 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 6 0x5E 0x00 0x00 # PAGE = 0x00 (CH0 P0V75_AVDD_7, Vnom=0.75) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x01 # PAGE = 0x01 (CH1 P1V5_AVDD_7, Vnom=1.5) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x02 # PAGE = 0x02 (CH2 P0V9_AVDD_7, Vnom=0.9) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x03 # PAGE = 0x03 (CH3 P1V8_5, Vnom=1.8) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x04 # PAGE = 0x04 (CH4 P1V8_2, Vnom=1.8) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x05 # PAGE = 0x05 (CH5 PVDD3_3V_SYNTH_LDO_B2, Vnom=3.3) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x06 # PAGE = 0x06 (CH6 PVDD3_3V_SYNTH_LDO_A2, Vnom=3.3) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5E 0x00 0x07 # PAGE = 0x07 (CH7 PVDD3_3V_SYNTH_LDO_A1, Vnom=3.3) +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5F 0x00 0x00 # PAGE = 0x00 (CH8 PVDD1V5_TSC, Vnom=1.5) +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5F 0x00 0x01 # PAGE = 0x01 (CH9 PVDD1V5_ANLG, Vnom=1.5) +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT +# CH10 未使用(VNOM=-),不下指令 +# CH11 未使用(VNOM=-),不下指令 +cb_pmbus_write 6 0x5F 0x00 0x04 # PAGE = 0x04 (CH12 PVDD1V5_1, Vnom=1.5) +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT +# CH13 未使用(VNOM=-),不下指令 +cb_pmbus_write 6 0x5F 0x00 0x06 # PAGE = 0x06 (CH14 P1V8_DVDDIO_1, Vnom=1.8) +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT +cb_pmbus_write 6 0x5F 0x00 0x07 # PAGE = 0x07 (CH15 P0V75_DVDD_7, Vnom=0.75) +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 P0V75_AVDD_7 Vnom=0.75 chip=0x5E page=0x00 ---- +cb_pmbus_write 6 0x5E 0x00 0x00 +cb_pmbus_write 6 0x5E 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 6 0x5E 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 6 0x5E 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 6 0x5E 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 6 0x5E 0x00 0x00 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x00 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P1V5_AVDD_7 Vnom=1.5 chip=0x5E page=0x01 ---- +cb_pmbus_write 6 0x5E 0x00 0x01 +cb_pmbus_write 6 0x5E 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 6 0x5E 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 6 0x5E 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 6 0x5E 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 6 0x5E 0x00 0x01 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x01 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH2 P0V9_AVDD_7 Vnom=0.9 chip=0x5E page=0x02 ---- +cb_pmbus_write 6 0x5E 0x00 0x02 +cb_pmbus_write 6 0x5E 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 6 0x5E 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 6 0x5E 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 6 0x5E 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 6 0x5E 0x00 0x02 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x02 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH3 P1V8_5 Vnom=1.8 chip=0x5E page=0x03 ---- +cb_pmbus_write 6 0x5E 0x00 0x03 +cb_pmbus_write 6 0x5E 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 6 0x5E 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 6 0x5E 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 6 0x5E 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 6 0x5E 0x00 0x03 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x03 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH4 P1V8_2 Vnom=1.8 chip=0x5E page=0x04 ---- +cb_pmbus_write 6 0x5E 0x00 0x04 +cb_pmbus_write 6 0x5E 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 6 0x5E 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 6 0x5E 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 6 0x5E 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 6 0x5E 0x00 0x04 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x04 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH5 PVDD3_3V_SYNTH_LDO_B2 Vnom=3.3 chip=0x5E page=0x05 ---- +cb_pmbus_write 6 0x5E 0x00 0x05 +cb_pmbus_write 6 0x5E 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 6 0x5E 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 6 0x5E 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 6 0x5E 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 6 0x5E 0x00 0x05 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x05 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH6 PVDD3_3V_SYNTH_LDO_A2 Vnom=3.3 chip=0x5E page=0x06 ---- +cb_pmbus_write 6 0x5E 0x00 0x06 +cb_pmbus_write 6 0x5E 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 6 0x5E 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 6 0x5E 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 6 0x5E 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 6 0x5E 0x00 0x06 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x06 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH7 PVDD3_3V_SYNTH_LDO_A1 Vnom=3.3 chip=0x5E page=0x07 ---- +cb_pmbus_write 6 0x5E 0x00 0x07 +cb_pmbus_write 6 0x5E 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 6 0x5E 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 6 0x5E 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 6 0x5E 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 6 0x5E 0x00 0x07 +cb_pmbus_write 6 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5E 0x00 0x07 +cb_pmbus_read 6 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH8 PVDD1V5_TSC Vnom=1.5 chip=0x5F page=0x00 ---- +cb_pmbus_write 6 0x5F 0x00 0x00 +cb_pmbus_write 6 0x5F 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 6 0x5F 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 6 0x5F 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 6 0x5F 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 6 0x5F 0x00 0x00 +cb_pmbus_write 6 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5F 0x00 0x00 +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT read-back + +# ---- CH9 PVDD1V5_ANLG Vnom=1.5 chip=0x5F page=0x01 ---- +cb_pmbus_write 6 0x5F 0x00 0x01 +cb_pmbus_write 6 0x5F 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 6 0x5F 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 6 0x5F 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 6 0x5F 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 6 0x5F 0x00 0x01 +cb_pmbus_write 6 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5F 0x00 0x01 +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT read-back + +# CH10 未使用(VNOM=-),margin_set 直接跳過 +# CH11 未使用(VNOM=-),margin_set 直接跳過 +# ---- CH12 PVDD1V5_1 Vnom=1.5 chip=0x5F page=0x04 ---- +cb_pmbus_write 6 0x5F 0x00 0x04 +cb_pmbus_write 6 0x5F 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 6 0x5F 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 6 0x5F 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 6 0x5F 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 6 0x5F 0x00 0x04 +cb_pmbus_write 6 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5F 0x00 0x04 +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT read-back + +# CH13 未使用(VNOM=-),margin_set 直接跳過 +# ---- CH14 P1V8_DVDDIO_1 Vnom=1.8 chip=0x5F page=0x06 ---- +cb_pmbus_write 6 0x5F 0x00 0x06 +cb_pmbus_write 6 0x5F 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 6 0x5F 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 6 0x5F 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 6 0x5F 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 6 0x5F 0x00 0x06 +cb_pmbus_write 6 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5F 0x00 0x06 +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT read-back + +# ---- CH15 P0V75_DVDD_7 Vnom=0.75 chip=0x5F page=0x07 ---- +cb_pmbus_write 6 0x5F 0x00 0x07 +cb_pmbus_write 6 0x5F 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 6 0x5F 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 6 0x5F 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 6 0x5F 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 6 0x5F 0x00 0x07 +cb_pmbus_write 6 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 6 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 6 0x5F 0x00 0x07 +cb_pmbus_read 6 0x5F 0x8b 2 # READ_VOUT read-back + +``` + +### 7.3 Blanton_SWB0_CONN15 (CB F3 Ch8) + +LTC2977:`0x62` = CH0~CH7,`0x63` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB0_CONN15` + +```bash +cb_i2c_init 8 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 8 0x62 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 8 0x63 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 8 0x62 0x00 0x00 # PAGE = 0x00 (CH0 P1V5_AVDD_55, Vnom=1.5) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x62 0x00 0x01 # PAGE = 0x01 (CH1 P0V9_AVDD_55, Vnom=0.9) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x62 0x00 0x02 # PAGE = 0x02 (CH2 P0V75_DVDD_63, Vnom=0.75) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x62 0x00 0x03 # PAGE = 0x03 (CH3 P0V75_AVDD_63, Vnom=0.75) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x62 0x00 0x04 # PAGE = 0x04 (CH4 P1V5_AVDD_63, Vnom=1.5) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x62 0x00 0x05 # PAGE = 0x05 (CH5 P0V9_AVDD_63, Vnom=0.9) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x62 0x00 0x06 # PAGE = 0x06 (CH6 PVDD3_3V_SYNTH_LDO_B3, Vnom=3.3) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x62 0x00 0x07 # PAGE = 0x07 (CH7 PVDD1V5_3, Vnom=1.5) +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x63 0x00 0x00 # PAGE = 0x00 (CH8 P0V85_STBY, Vnom=0.85) +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x63 0x00 0x01 # PAGE = 0x01 (CH9 P1V8_STBY, Vnom=1.8) +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT +# CH10 未使用(VNOM=-),不下指令 +cb_pmbus_write 8 0x63 0x00 0x03 # PAGE = 0x03 (CH11 P3V3_STBY, Vnom=3.3) +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x63 0x00 0x04 # PAGE = 0x04 (CH12 PVDD0V9_2, Vnom=0.9) +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x63 0x00 0x05 # PAGE = 0x05 (CH13 P0V75_DVDD_55, Vnom=0.75) +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x63 0x00 0x06 # PAGE = 0x06 (CH14 P0V75_AVDD_55, Vnom=0.75) +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x63 0x00 0x07 # PAGE = 0x07 (CH15 P1V8_DVDDIO_4, Vnom=1.8) +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 P1V5_AVDD_55 Vnom=1.5 chip=0x62 page=0x00 ---- +cb_pmbus_write 8 0x62 0x00 0x00 +cb_pmbus_write 8 0x62 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 8 0x62 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 8 0x62 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 8 0x62 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 8 0x62 0x00 0x00 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x00 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P0V9_AVDD_55 Vnom=0.9 chip=0x62 page=0x01 ---- +cb_pmbus_write 8 0x62 0x00 0x01 +cb_pmbus_write 8 0x62 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 8 0x62 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 8 0x62 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 8 0x62 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 8 0x62 0x00 0x01 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x01 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH2 P0V75_DVDD_63 Vnom=0.75 chip=0x62 page=0x02 ---- +cb_pmbus_write 8 0x62 0x00 0x02 +cb_pmbus_write 8 0x62 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 8 0x62 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 8 0x62 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 8 0x62 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 8 0x62 0x00 0x02 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x02 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH3 P0V75_AVDD_63 Vnom=0.75 chip=0x62 page=0x03 ---- +cb_pmbus_write 8 0x62 0x00 0x03 +cb_pmbus_write 8 0x62 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 8 0x62 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 8 0x62 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 8 0x62 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 8 0x62 0x00 0x03 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x03 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH4 P1V5_AVDD_63 Vnom=1.5 chip=0x62 page=0x04 ---- +cb_pmbus_write 8 0x62 0x00 0x04 +cb_pmbus_write 8 0x62 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 8 0x62 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 8 0x62 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 8 0x62 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 8 0x62 0x00 0x04 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x04 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH5 P0V9_AVDD_63 Vnom=0.9 chip=0x62 page=0x05 ---- +cb_pmbus_write 8 0x62 0x00 0x05 +cb_pmbus_write 8 0x62 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 8 0x62 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 8 0x62 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 8 0x62 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 8 0x62 0x00 0x05 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x05 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH6 PVDD3_3V_SYNTH_LDO_B3 Vnom=3.3 chip=0x62 page=0x06 ---- +cb_pmbus_write 8 0x62 0x00 0x06 +cb_pmbus_write 8 0x62 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 8 0x62 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 8 0x62 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 8 0x62 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 8 0x62 0x00 0x06 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x06 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH7 PVDD1V5_3 Vnom=1.5 chip=0x62 page=0x07 ---- +cb_pmbus_write 8 0x62 0x00 0x07 +cb_pmbus_write 8 0x62 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 8 0x62 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 8 0x62 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 8 0x62 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 8 0x62 0x00 0x07 +cb_pmbus_write 8 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x62 0x00 0x07 +cb_pmbus_read 8 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH8 P0V85_STBY Vnom=0.85 chip=0x63 page=0x00 ---- +cb_pmbus_write 8 0x63 0x00 0x00 +cb_pmbus_write 8 0x63 0x25 0x04 0x1c # VOUT_MARGIN_HIGH 0x1c04 -> 0.8755 V +cb_pmbus_write 8 0x63 0x26 0x62 0x1a # VOUT_MARGIN_LOW 0x1a62 -> 0.8245 V +cb_pmbus_write 8 0x63 0x40 0x8f 0x1c # VOUT_OV_FAULT_LIMIT 0x1c8f -> 0.8925 V +cb_pmbus_write 8 0x63 0x44 0xd7 0x19 # VOUT_UV_FAULT_LIMIT 0x19d7 -> 0.8075 V +cb_pmbus_write 8 0x63 0x00 0x00 +cb_pmbus_write 8 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x63 0x00 0x00 +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH9 P1V8_STBY Vnom=1.8 chip=0x63 page=0x01 ---- +cb_pmbus_write 8 0x63 0x00 0x01 +cb_pmbus_write 8 0x63 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 8 0x63 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 8 0x63 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 8 0x63 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 8 0x63 0x00 0x01 +cb_pmbus_write 8 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x63 0x00 0x01 +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT read-back + +# CH10 未使用(VNOM=-),margin_set 直接跳過 +# ---- CH11 P3V3_STBY Vnom=3.3 chip=0x63 page=0x03 ---- +cb_pmbus_write 8 0x63 0x00 0x03 +cb_pmbus_write 8 0x63 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 8 0x63 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 8 0x63 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 8 0x63 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 8 0x63 0x00 0x03 +cb_pmbus_write 8 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x63 0x00 0x03 +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH12 PVDD0V9_2 Vnom=0.9 chip=0x63 page=0x04 ---- +cb_pmbus_write 8 0x63 0x00 0x04 +cb_pmbus_write 8 0x63 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 8 0x63 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 8 0x63 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 8 0x63 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 8 0x63 0x00 0x04 +cb_pmbus_write 8 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x63 0x00 0x04 +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH13 P0V75_DVDD_55 Vnom=0.75 chip=0x63 page=0x05 ---- +cb_pmbus_write 8 0x63 0x00 0x05 +cb_pmbus_write 8 0x63 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 8 0x63 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 8 0x63 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 8 0x63 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 8 0x63 0x00 0x05 +cb_pmbus_write 8 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x63 0x00 0x05 +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH14 P0V75_AVDD_55 Vnom=0.75 chip=0x63 page=0x06 ---- +cb_pmbus_write 8 0x63 0x00 0x06 +cb_pmbus_write 8 0x63 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 8 0x63 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 8 0x63 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 8 0x63 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 8 0x63 0x00 0x06 +cb_pmbus_write 8 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x63 0x00 0x06 +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH15 P1V8_DVDDIO_4 Vnom=1.8 chip=0x63 page=0x07 ---- +cb_pmbus_write 8 0x63 0x00 0x07 +cb_pmbus_write 8 0x63 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 8 0x63 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 8 0x63 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 8 0x63 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 8 0x63 0x00 0x07 +cb_pmbus_write 8 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x63 0x00 0x07 +cb_pmbus_read 8 0x63 0x8b 2 # READ_VOUT read-back + +``` + +### 7.4 Blanton_SWB0_CONN16 (CB F3 Ch8) + +LTC2977:`0x64` = CH0~CH7,`0x65` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB0_CONN16` + +```bash +cb_i2c_init 8 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 8 0x64 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 8 0x65 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 8 0x64 0x00 0x00 # PAGE = 0x00 (CH0 PVDD1V5_0, Vnom=1.5) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x64 0x00 0x01 # PAGE = 0x01 (CH1 P1V8_4, Vnom=1.8) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x64 0x00 0x02 # PAGE = 0x02 (CH2 PVDD3_3V_SYNTH_LDO_B5, Vnom=3.3) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x64 0x00 0x03 # PAGE = 0x03 (CH3 PVDD3_3V_SYNTH_LDO_A5, Vnom=3.3) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x64 0x00 0x04 # PAGE = 0x04 (CH4 PVDD3_3V_SYNTH_LDO_B4, Vnom=3.3) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x64 0x00 0x05 # PAGE = 0x05 (CH5 PVDD3_3V_SYNTH_LDO_A4, Vnom=3.3) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x64 0x00 0x06 # PAGE = 0x06 (CH6 P3V3, Vnom=3.3) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x64 0x00 0x07 # PAGE = 0x07 (CH7 PVDD0_8V_T3, Vnom=0.8) +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x00 # PAGE = 0x00 (CH8 P0V75_DVDD_1, Vnom=0.75) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x01 # PAGE = 0x01 (CH9 P0V75_AVDD_1, Vnom=0.75) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x02 # PAGE = 0x02 (CH10 P1V5_AVDD_1, Vnom=1.5) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x03 # PAGE = 0x03 (CH11 P0V9_AVDD_1, Vnom=0.9) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x04 # PAGE = 0x04 (CH12 PVDD0V9_0, Vnom=0.9) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x05 # PAGE = 0x05 (CH13 PVDD0V9_1, Vnom=0.9) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x06 # PAGE = 0x06 (CH14 PVDD0V9_3, Vnom=0.9) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 8 0x65 0x00 0x07 # PAGE = 0x07 (CH15 PVDD1V2_T3, Vnom=1.2) +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 PVDD1V5_0 Vnom=1.5 chip=0x64 page=0x00 ---- +cb_pmbus_write 8 0x64 0x00 0x00 +cb_pmbus_write 8 0x64 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 8 0x64 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 8 0x64 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 8 0x64 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 8 0x64 0x00 0x00 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x00 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P1V8_4 Vnom=1.8 chip=0x64 page=0x01 ---- +cb_pmbus_write 8 0x64 0x00 0x01 +cb_pmbus_write 8 0x64 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 8 0x64 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 8 0x64 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 8 0x64 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 8 0x64 0x00 0x01 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x01 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH2 PVDD3_3V_SYNTH_LDO_B5 Vnom=3.3 chip=0x64 page=0x02 ---- +cb_pmbus_write 8 0x64 0x00 0x02 +cb_pmbus_write 8 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 8 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 8 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 8 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 8 0x64 0x00 0x02 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x02 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH3 PVDD3_3V_SYNTH_LDO_A5 Vnom=3.3 chip=0x64 page=0x03 ---- +cb_pmbus_write 8 0x64 0x00 0x03 +cb_pmbus_write 8 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 8 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 8 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 8 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 8 0x64 0x00 0x03 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x03 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH4 PVDD3_3V_SYNTH_LDO_B4 Vnom=3.3 chip=0x64 page=0x04 ---- +cb_pmbus_write 8 0x64 0x00 0x04 +cb_pmbus_write 8 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 8 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 8 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 8 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 8 0x64 0x00 0x04 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x04 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH5 PVDD3_3V_SYNTH_LDO_A4 Vnom=3.3 chip=0x64 page=0x05 ---- +cb_pmbus_write 8 0x64 0x00 0x05 +cb_pmbus_write 8 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 8 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 8 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 8 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 8 0x64 0x00 0x05 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x05 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH6 P3V3 Vnom=3.3 chip=0x64 page=0x06 ---- +cb_pmbus_write 8 0x64 0x00 0x06 +cb_pmbus_write 8 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 8 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 8 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 8 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 8 0x64 0x00 0x06 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x06 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH7 PVDD0_8V_T3 Vnom=0.8 chip=0x64 page=0x07 ---- +cb_pmbus_write 8 0x64 0x00 0x07 +cb_pmbus_write 8 0x64 0x25 0x5e 0x1a # VOUT_MARGIN_HIGH 0x1a5e -> 0.8240 V +cb_pmbus_write 8 0x64 0x26 0xd4 0x18 # VOUT_MARGIN_LOW 0x18d4 -> 0.7759 V +cb_pmbus_write 8 0x64 0x40 0xe1 0x1a # VOUT_OV_FAULT_LIMIT 0x1ae1 -> 0.8400 V +cb_pmbus_write 8 0x64 0x44 0x51 0x18 # VOUT_UV_FAULT_LIMIT 0x1851 -> 0.7599 V +cb_pmbus_write 8 0x64 0x00 0x07 +cb_pmbus_write 8 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x64 0x00 0x07 +cb_pmbus_read 8 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH8 P0V75_DVDD_1 Vnom=0.75 chip=0x65 page=0x00 ---- +cb_pmbus_write 8 0x65 0x00 0x00 +cb_pmbus_write 8 0x65 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 8 0x65 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 8 0x65 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 8 0x65 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 8 0x65 0x00 0x00 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x00 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH9 P0V75_AVDD_1 Vnom=0.75 chip=0x65 page=0x01 ---- +cb_pmbus_write 8 0x65 0x00 0x01 +cb_pmbus_write 8 0x65 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 8 0x65 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 8 0x65 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 8 0x65 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 8 0x65 0x00 0x01 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x01 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH10 P1V5_AVDD_1 Vnom=1.5 chip=0x65 page=0x02 ---- +cb_pmbus_write 8 0x65 0x00 0x02 +cb_pmbus_write 8 0x65 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 8 0x65 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 8 0x65 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 8 0x65 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 8 0x65 0x00 0x02 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x02 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH11 P0V9_AVDD_1 Vnom=0.9 chip=0x65 page=0x03 ---- +cb_pmbus_write 8 0x65 0x00 0x03 +cb_pmbus_write 8 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 8 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 8 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 8 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 8 0x65 0x00 0x03 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x03 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH12 PVDD0V9_0 Vnom=0.9 chip=0x65 page=0x04 ---- +cb_pmbus_write 8 0x65 0x00 0x04 +cb_pmbus_write 8 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 8 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 8 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 8 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 8 0x65 0x00 0x04 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x04 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH13 PVDD0V9_1 Vnom=0.9 chip=0x65 page=0x05 ---- +cb_pmbus_write 8 0x65 0x00 0x05 +cb_pmbus_write 8 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 8 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 8 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 8 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 8 0x65 0x00 0x05 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x05 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH14 PVDD0V9_3 Vnom=0.9 chip=0x65 page=0x06 ---- +cb_pmbus_write 8 0x65 0x00 0x06 +cb_pmbus_write 8 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 8 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 8 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 8 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 8 0x65 0x00 0x06 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x06 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH15 PVDD1V2_T3 Vnom=1.2 chip=0x65 page=0x07 ---- +cb_pmbus_write 8 0x65 0x00 0x07 +cb_pmbus_write 8 0x65 0x25 0x8d 0x27 # VOUT_MARGIN_HIGH 0x278d -> 1.2360 V +cb_pmbus_write 8 0x65 0x26 0x3f 0x25 # VOUT_MARGIN_LOW 0x253f -> 1.1639 V +cb_pmbus_write 8 0x65 0x40 0x51 0x28 # VOUT_OV_FAULT_LIMIT 0x2851 -> 1.2599 V +cb_pmbus_write 8 0x65 0x44 0x7a 0x24 # VOUT_UV_FAULT_LIMIT 0x247a -> 1.1399 V +cb_pmbus_write 8 0x65 0x00 0x07 +cb_pmbus_write 8 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 8 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 8 0x65 0x00 0x07 +cb_pmbus_read 8 0x65 0x8b 2 # READ_VOUT read-back + +``` + +### 7.5 Blanton_SWB1_CONN13 (CB F3 Ch7) + +LTC2977:`0x5C` = CH0~CH7,`0x5D` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB1_CONN13` + +```bash +cb_i2c_init 7 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 7 0x5C 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 7 0x5D 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 7 0x5C 0x00 0x00 # PAGE = 0x00 (CH0 P0V75_DVDD_47, Vnom=0.75) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5C 0x00 0x01 # PAGE = 0x01 (CH1 P0V75_AVDD_47, Vnom=0.75) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5C 0x00 0x02 # PAGE = 0x02 (CH2 P1V5_AVDD_47, Vnom=1.5) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5C 0x00 0x03 # PAGE = 0x03 (CH3 P0V9_AVDD_47, Vnom=0.9) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5C 0x00 0x04 # PAGE = 0x04 (CH4 P1V8_1, Vnom=1.8) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5C 0x00 0x05 # PAGE = 0x05 (CH5 PVDD3_3V_SYNTH_LDO_A3, Vnom=3.3) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5C 0x00 0x06 # PAGE = 0x06 (CH6 PVDD3_3V_SYNTH_LDO_B1, Vnom=3.3) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5C 0x00 0x07 # PAGE = 0x07 (CH7 P1V8_3, Vnom=1.8) +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x00 # PAGE = 0x00 (CH8 P1V8_DVDDIO_3, Vnom=1.8) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x01 # PAGE = 0x01 (CH9 P0V75_DVDD_39, Vnom=0.75) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x02 # PAGE = 0x02 (CH10 P0V75_AVDD_39, Vnom=0.75) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x03 # PAGE = 0x03 (CH11 P1V5_AVDD_39, Vnom=1.5) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x04 # PAGE = 0x04 (CH12 P0V9_AVDD_39, Vnom=0.9) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x05 # PAGE = 0x05 (CH13 PVDD1V5_2, Vnom=1.5) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x06 # PAGE = 0x06 (CH14 PVDD1V8_DUT, Vnom=1.8) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5D 0x00 0x07 # PAGE = 0x07 (CH15 PVDD_MDIO, Vnom=1.2) +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 P0V75_DVDD_47 Vnom=0.75 chip=0x5C page=0x00 ---- +cb_pmbus_write 7 0x5C 0x00 0x00 +cb_pmbus_write 7 0x5C 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 7 0x5C 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 7 0x5C 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 7 0x5C 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 7 0x5C 0x00 0x00 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x00 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P0V75_AVDD_47 Vnom=0.75 chip=0x5C page=0x01 ---- +cb_pmbus_write 7 0x5C 0x00 0x01 +cb_pmbus_write 7 0x5C 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 7 0x5C 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 7 0x5C 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 7 0x5C 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 7 0x5C 0x00 0x01 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x01 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH2 P1V5_AVDD_47 Vnom=1.5 chip=0x5C page=0x02 ---- +cb_pmbus_write 7 0x5C 0x00 0x02 +cb_pmbus_write 7 0x5C 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 7 0x5C 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 7 0x5C 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 7 0x5C 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 7 0x5C 0x00 0x02 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x02 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH3 P0V9_AVDD_47 Vnom=0.9 chip=0x5C page=0x03 ---- +cb_pmbus_write 7 0x5C 0x00 0x03 +cb_pmbus_write 7 0x5C 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 7 0x5C 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 7 0x5C 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 7 0x5C 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 7 0x5C 0x00 0x03 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x03 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH4 P1V8_1 Vnom=1.8 chip=0x5C page=0x04 ---- +cb_pmbus_write 7 0x5C 0x00 0x04 +cb_pmbus_write 7 0x5C 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 7 0x5C 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 7 0x5C 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 7 0x5C 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 7 0x5C 0x00 0x04 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x04 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH5 PVDD3_3V_SYNTH_LDO_A3 Vnom=3.3 chip=0x5C page=0x05 ---- +cb_pmbus_write 7 0x5C 0x00 0x05 +cb_pmbus_write 7 0x5C 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 7 0x5C 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 7 0x5C 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 7 0x5C 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 7 0x5C 0x00 0x05 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x05 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH6 PVDD3_3V_SYNTH_LDO_B1 Vnom=3.3 chip=0x5C page=0x06 ---- +cb_pmbus_write 7 0x5C 0x00 0x06 +cb_pmbus_write 7 0x5C 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 7 0x5C 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 7 0x5C 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 7 0x5C 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 7 0x5C 0x00 0x06 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x06 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH7 P1V8_3 Vnom=1.8 chip=0x5C page=0x07 ---- +cb_pmbus_write 7 0x5C 0x00 0x07 +cb_pmbus_write 7 0x5C 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 7 0x5C 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 7 0x5C 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 7 0x5C 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 7 0x5C 0x00 0x07 +cb_pmbus_write 7 0x5C 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5C 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5C 0x00 0x07 +cb_pmbus_read 7 0x5C 0x8b 2 # READ_VOUT read-back + +# ---- CH8 P1V8_DVDDIO_3 Vnom=1.8 chip=0x5D page=0x00 ---- +cb_pmbus_write 7 0x5D 0x00 0x00 +cb_pmbus_write 7 0x5D 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 7 0x5D 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 7 0x5D 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 7 0x5D 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 7 0x5D 0x00 0x00 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x00 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +# ---- CH9 P0V75_DVDD_39 Vnom=0.75 chip=0x5D page=0x01 ---- +cb_pmbus_write 7 0x5D 0x00 0x01 +cb_pmbus_write 7 0x5D 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 7 0x5D 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 7 0x5D 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 7 0x5D 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 7 0x5D 0x00 0x01 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x01 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +# ---- CH10 P0V75_AVDD_39 Vnom=0.75 chip=0x5D page=0x02 ---- +cb_pmbus_write 7 0x5D 0x00 0x02 +cb_pmbus_write 7 0x5D 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 7 0x5D 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 7 0x5D 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 7 0x5D 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 7 0x5D 0x00 0x02 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x02 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +# ---- CH11 P1V5_AVDD_39 Vnom=1.5 chip=0x5D page=0x03 ---- +cb_pmbus_write 7 0x5D 0x00 0x03 +cb_pmbus_write 7 0x5D 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 7 0x5D 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 7 0x5D 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 7 0x5D 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 7 0x5D 0x00 0x03 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x03 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +# ---- CH12 P0V9_AVDD_39 Vnom=0.9 chip=0x5D page=0x04 ---- +cb_pmbus_write 7 0x5D 0x00 0x04 +cb_pmbus_write 7 0x5D 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 7 0x5D 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 7 0x5D 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 7 0x5D 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 7 0x5D 0x00 0x04 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x04 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +# ---- CH13 PVDD1V5_2 Vnom=1.5 chip=0x5D page=0x05 ---- +cb_pmbus_write 7 0x5D 0x00 0x05 +cb_pmbus_write 7 0x5D 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 7 0x5D 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 7 0x5D 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 7 0x5D 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 7 0x5D 0x00 0x05 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x05 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +# ---- CH14 PVDD1V8_DUT Vnom=1.8 chip=0x5D page=0x06 ---- +cb_pmbus_write 7 0x5D 0x00 0x06 +cb_pmbus_write 7 0x5D 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 7 0x5D 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 7 0x5D 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 7 0x5D 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 7 0x5D 0x00 0x06 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x06 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +# ---- CH15 PVDD_MDIO Vnom=1.2 chip=0x5D page=0x07 ---- +cb_pmbus_write 7 0x5D 0x00 0x07 +cb_pmbus_write 7 0x5D 0x25 0x8d 0x27 # VOUT_MARGIN_HIGH 0x278d -> 1.2360 V +cb_pmbus_write 7 0x5D 0x26 0x3f 0x25 # VOUT_MARGIN_LOW 0x253f -> 1.1639 V +cb_pmbus_write 7 0x5D 0x40 0x51 0x28 # VOUT_OV_FAULT_LIMIT 0x2851 -> 1.2599 V +cb_pmbus_write 7 0x5D 0x44 0x7a 0x24 # VOUT_UV_FAULT_LIMIT 0x247a -> 1.1399 V +cb_pmbus_write 7 0x5D 0x00 0x07 +cb_pmbus_write 7 0x5D 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5D 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5D 0x00 0x07 +cb_pmbus_read 7 0x5D 0x8b 2 # READ_VOUT read-back + +``` + +### 7.6 Blanton_SWB1_CONN14 (CB F3 Ch7) + +LTC2977:`0x5E` = CH0~CH7,`0x5F` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB1_CONN14` + +```bash +cb_i2c_init 7 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 7 0x5E 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 7 0x5F 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 7 0x5E 0x00 0x00 # PAGE = 0x00 (CH0 P0V75_AVDD_7, Vnom=0.75) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5E 0x00 0x01 # PAGE = 0x01 (CH1 P1V5_AVDD_7, Vnom=1.5) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5E 0x00 0x02 # PAGE = 0x02 (CH2 P0V9_AVDD_7, Vnom=0.9) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5E 0x00 0x03 # PAGE = 0x03 (CH3 P1V8_5, Vnom=1.8) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5E 0x00 0x04 # PAGE = 0x04 (CH4 P1V8_2, Vnom=1.8) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5E 0x00 0x05 # PAGE = 0x05 (CH5 PVDD3_3V_SYNTH_LDO_B2, Vnom=3.3) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5E 0x00 0x06 # PAGE = 0x06 (CH6 PVDD3_3V_SYNTH_LDO_A2, Vnom=3.3) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5E 0x00 0x07 # PAGE = 0x07 (CH7 PVDD3_3V_SYNTH_LDO_A1, Vnom=3.3) +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5F 0x00 0x00 # PAGE = 0x00 (CH8 PVDD1V5_TSC, Vnom=1.5) +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5F 0x00 0x01 # PAGE = 0x01 (CH9 PVDD1V5_ANLG, Vnom=1.5) +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT +# CH10 未使用(VNOM=-),不下指令 +# CH11 未使用(VNOM=-),不下指令 +cb_pmbus_write 7 0x5F 0x00 0x04 # PAGE = 0x04 (CH12 PVDD1V5_1, Vnom=1.5) +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT +# CH13 未使用(VNOM=-),不下指令 +cb_pmbus_write 7 0x5F 0x00 0x06 # PAGE = 0x06 (CH14 P1V8_DVDDIO_1, Vnom=1.8) +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT +cb_pmbus_write 7 0x5F 0x00 0x07 # PAGE = 0x07 (CH15 P0V75_DVDD_7, Vnom=0.75) +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 P0V75_AVDD_7 Vnom=0.75 chip=0x5E page=0x00 ---- +cb_pmbus_write 7 0x5E 0x00 0x00 +cb_pmbus_write 7 0x5E 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 7 0x5E 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 7 0x5E 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 7 0x5E 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 7 0x5E 0x00 0x00 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x00 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P1V5_AVDD_7 Vnom=1.5 chip=0x5E page=0x01 ---- +cb_pmbus_write 7 0x5E 0x00 0x01 +cb_pmbus_write 7 0x5E 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 7 0x5E 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 7 0x5E 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 7 0x5E 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 7 0x5E 0x00 0x01 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x01 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH2 P0V9_AVDD_7 Vnom=0.9 chip=0x5E page=0x02 ---- +cb_pmbus_write 7 0x5E 0x00 0x02 +cb_pmbus_write 7 0x5E 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 7 0x5E 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 7 0x5E 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 7 0x5E 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 7 0x5E 0x00 0x02 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x02 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH3 P1V8_5 Vnom=1.8 chip=0x5E page=0x03 ---- +cb_pmbus_write 7 0x5E 0x00 0x03 +cb_pmbus_write 7 0x5E 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 7 0x5E 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 7 0x5E 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 7 0x5E 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 7 0x5E 0x00 0x03 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x03 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH4 P1V8_2 Vnom=1.8 chip=0x5E page=0x04 ---- +cb_pmbus_write 7 0x5E 0x00 0x04 +cb_pmbus_write 7 0x5E 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 7 0x5E 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 7 0x5E 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 7 0x5E 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 7 0x5E 0x00 0x04 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x04 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH5 PVDD3_3V_SYNTH_LDO_B2 Vnom=3.3 chip=0x5E page=0x05 ---- +cb_pmbus_write 7 0x5E 0x00 0x05 +cb_pmbus_write 7 0x5E 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 7 0x5E 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 7 0x5E 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 7 0x5E 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 7 0x5E 0x00 0x05 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x05 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH6 PVDD3_3V_SYNTH_LDO_A2 Vnom=3.3 chip=0x5E page=0x06 ---- +cb_pmbus_write 7 0x5E 0x00 0x06 +cb_pmbus_write 7 0x5E 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 7 0x5E 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 7 0x5E 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 7 0x5E 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 7 0x5E 0x00 0x06 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x06 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH7 PVDD3_3V_SYNTH_LDO_A1 Vnom=3.3 chip=0x5E page=0x07 ---- +cb_pmbus_write 7 0x5E 0x00 0x07 +cb_pmbus_write 7 0x5E 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 7 0x5E 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 7 0x5E 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 7 0x5E 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 7 0x5E 0x00 0x07 +cb_pmbus_write 7 0x5E 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5E 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5E 0x00 0x07 +cb_pmbus_read 7 0x5E 0x8b 2 # READ_VOUT read-back + +# ---- CH8 PVDD1V5_TSC Vnom=1.5 chip=0x5F page=0x00 ---- +cb_pmbus_write 7 0x5F 0x00 0x00 +cb_pmbus_write 7 0x5F 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 7 0x5F 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 7 0x5F 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 7 0x5F 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 7 0x5F 0x00 0x00 +cb_pmbus_write 7 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5F 0x00 0x00 +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT read-back + +# ---- CH9 PVDD1V5_ANLG Vnom=1.5 chip=0x5F page=0x01 ---- +cb_pmbus_write 7 0x5F 0x00 0x01 +cb_pmbus_write 7 0x5F 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 7 0x5F 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 7 0x5F 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 7 0x5F 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 7 0x5F 0x00 0x01 +cb_pmbus_write 7 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5F 0x00 0x01 +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT read-back + +# CH10 未使用(VNOM=-),margin_set 直接跳過 +# CH11 未使用(VNOM=-),margin_set 直接跳過 +# ---- CH12 PVDD1V5_1 Vnom=1.5 chip=0x5F page=0x04 ---- +cb_pmbus_write 7 0x5F 0x00 0x04 +cb_pmbus_write 7 0x5F 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 7 0x5F 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 7 0x5F 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 7 0x5F 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 7 0x5F 0x00 0x04 +cb_pmbus_write 7 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5F 0x00 0x04 +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT read-back + +# CH13 未使用(VNOM=-),margin_set 直接跳過 +# ---- CH14 P1V8_DVDDIO_1 Vnom=1.8 chip=0x5F page=0x06 ---- +cb_pmbus_write 7 0x5F 0x00 0x06 +cb_pmbus_write 7 0x5F 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 7 0x5F 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 7 0x5F 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 7 0x5F 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 7 0x5F 0x00 0x06 +cb_pmbus_write 7 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5F 0x00 0x06 +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT read-back + +# ---- CH15 P0V75_DVDD_7 Vnom=0.75 chip=0x5F page=0x07 ---- +cb_pmbus_write 7 0x5F 0x00 0x07 +cb_pmbus_write 7 0x5F 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 7 0x5F 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 7 0x5F 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 7 0x5F 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 7 0x5F 0x00 0x07 +cb_pmbus_write 7 0x5F 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 7 0x5F 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 7 0x5F 0x00 0x07 +cb_pmbus_read 7 0x5F 0x8b 2 # READ_VOUT read-back + +``` + +### 7.7 Blanton_SWB1_CONN15 (CB F3 Ch9) + +LTC2977:`0x62` = CH0~CH7,`0x63` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB1_CONN15` + +```bash +cb_i2c_init 9 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 9 0x62 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 9 0x63 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 9 0x62 0x00 0x00 # PAGE = 0x00 (CH0 P1V5_AVDD_55, Vnom=1.5) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x62 0x00 0x01 # PAGE = 0x01 (CH1 P0V9_AVDD_55, Vnom=0.9) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x62 0x00 0x02 # PAGE = 0x02 (CH2 P0V75_DVDD_63, Vnom=0.75) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x62 0x00 0x03 # PAGE = 0x03 (CH3 P0V75_AVDD_63, Vnom=0.75) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x62 0x00 0x04 # PAGE = 0x04 (CH4 P1V5_AVDD_63, Vnom=1.5) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x62 0x00 0x05 # PAGE = 0x05 (CH5 P0V9_AVDD_63, Vnom=0.9) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x62 0x00 0x06 # PAGE = 0x06 (CH6 PVDD3_3V_SYNTH_LDO_B3, Vnom=3.3) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x62 0x00 0x07 # PAGE = 0x07 (CH7 PVDD1V5_3, Vnom=1.5) +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x63 0x00 0x00 # PAGE = 0x00 (CH8 P0V85_STBY, Vnom=0.85) +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x63 0x00 0x01 # PAGE = 0x01 (CH9 P1V8_STBY, Vnom=1.8) +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT +# CH10 未使用(VNOM=-),不下指令 +cb_pmbus_write 9 0x63 0x00 0x03 # PAGE = 0x03 (CH11 P3V3_STBY, Vnom=3.3) +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x63 0x00 0x04 # PAGE = 0x04 (CH12 PVDD0V9_2, Vnom=0.9) +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x63 0x00 0x05 # PAGE = 0x05 (CH13 P0V75_DVDD_55, Vnom=0.75) +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x63 0x00 0x06 # PAGE = 0x06 (CH14 P0V75_AVDD_55, Vnom=0.75) +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x63 0x00 0x07 # PAGE = 0x07 (CH15 P1V8_DVDDIO_4, Vnom=1.8) +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 P1V5_AVDD_55 Vnom=1.5 chip=0x62 page=0x00 ---- +cb_pmbus_write 9 0x62 0x00 0x00 +cb_pmbus_write 9 0x62 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 9 0x62 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 9 0x62 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 9 0x62 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 9 0x62 0x00 0x00 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x00 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P0V9_AVDD_55 Vnom=0.9 chip=0x62 page=0x01 ---- +cb_pmbus_write 9 0x62 0x00 0x01 +cb_pmbus_write 9 0x62 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 9 0x62 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 9 0x62 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 9 0x62 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 9 0x62 0x00 0x01 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x01 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH2 P0V75_DVDD_63 Vnom=0.75 chip=0x62 page=0x02 ---- +cb_pmbus_write 9 0x62 0x00 0x02 +cb_pmbus_write 9 0x62 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 9 0x62 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 9 0x62 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 9 0x62 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 9 0x62 0x00 0x02 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x02 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH3 P0V75_AVDD_63 Vnom=0.75 chip=0x62 page=0x03 ---- +cb_pmbus_write 9 0x62 0x00 0x03 +cb_pmbus_write 9 0x62 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 9 0x62 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 9 0x62 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 9 0x62 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 9 0x62 0x00 0x03 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x03 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH4 P1V5_AVDD_63 Vnom=1.5 chip=0x62 page=0x04 ---- +cb_pmbus_write 9 0x62 0x00 0x04 +cb_pmbus_write 9 0x62 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 9 0x62 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 9 0x62 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 9 0x62 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 9 0x62 0x00 0x04 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x04 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH5 P0V9_AVDD_63 Vnom=0.9 chip=0x62 page=0x05 ---- +cb_pmbus_write 9 0x62 0x00 0x05 +cb_pmbus_write 9 0x62 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 9 0x62 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 9 0x62 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 9 0x62 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 9 0x62 0x00 0x05 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x05 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH6 PVDD3_3V_SYNTH_LDO_B3 Vnom=3.3 chip=0x62 page=0x06 ---- +cb_pmbus_write 9 0x62 0x00 0x06 +cb_pmbus_write 9 0x62 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 9 0x62 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 9 0x62 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 9 0x62 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 9 0x62 0x00 0x06 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x06 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH7 PVDD1V5_3 Vnom=1.5 chip=0x62 page=0x07 ---- +cb_pmbus_write 9 0x62 0x00 0x07 +cb_pmbus_write 9 0x62 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 9 0x62 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 9 0x62 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 9 0x62 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 9 0x62 0x00 0x07 +cb_pmbus_write 9 0x62 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x62 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x62 0x00 0x07 +cb_pmbus_read 9 0x62 0x8b 2 # READ_VOUT read-back + +# ---- CH8 P0V85_STBY Vnom=0.85 chip=0x63 page=0x00 ---- +cb_pmbus_write 9 0x63 0x00 0x00 +cb_pmbus_write 9 0x63 0x25 0x04 0x1c # VOUT_MARGIN_HIGH 0x1c04 -> 0.8755 V +cb_pmbus_write 9 0x63 0x26 0x62 0x1a # VOUT_MARGIN_LOW 0x1a62 -> 0.8245 V +cb_pmbus_write 9 0x63 0x40 0x8f 0x1c # VOUT_OV_FAULT_LIMIT 0x1c8f -> 0.8925 V +cb_pmbus_write 9 0x63 0x44 0xd7 0x19 # VOUT_UV_FAULT_LIMIT 0x19d7 -> 0.8075 V +cb_pmbus_write 9 0x63 0x00 0x00 +cb_pmbus_write 9 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x63 0x00 0x00 +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH9 P1V8_STBY Vnom=1.8 chip=0x63 page=0x01 ---- +cb_pmbus_write 9 0x63 0x00 0x01 +cb_pmbus_write 9 0x63 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 9 0x63 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 9 0x63 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 9 0x63 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 9 0x63 0x00 0x01 +cb_pmbus_write 9 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x63 0x00 0x01 +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT read-back + +# CH10 未使用(VNOM=-),margin_set 直接跳過 +# ---- CH11 P3V3_STBY Vnom=3.3 chip=0x63 page=0x03 ---- +cb_pmbus_write 9 0x63 0x00 0x03 +cb_pmbus_write 9 0x63 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 9 0x63 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 9 0x63 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 9 0x63 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 9 0x63 0x00 0x03 +cb_pmbus_write 9 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x63 0x00 0x03 +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH12 PVDD0V9_2 Vnom=0.9 chip=0x63 page=0x04 ---- +cb_pmbus_write 9 0x63 0x00 0x04 +cb_pmbus_write 9 0x63 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 9 0x63 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 9 0x63 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 9 0x63 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 9 0x63 0x00 0x04 +cb_pmbus_write 9 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x63 0x00 0x04 +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH13 P0V75_DVDD_55 Vnom=0.75 chip=0x63 page=0x05 ---- +cb_pmbus_write 9 0x63 0x00 0x05 +cb_pmbus_write 9 0x63 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 9 0x63 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 9 0x63 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 9 0x63 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 9 0x63 0x00 0x05 +cb_pmbus_write 9 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x63 0x00 0x05 +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH14 P0V75_AVDD_55 Vnom=0.75 chip=0x63 page=0x06 ---- +cb_pmbus_write 9 0x63 0x00 0x06 +cb_pmbus_write 9 0x63 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 9 0x63 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 9 0x63 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 9 0x63 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 9 0x63 0x00 0x06 +cb_pmbus_write 9 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x63 0x00 0x06 +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT read-back + +# ---- CH15 P1V8_DVDDIO_4 Vnom=1.8 chip=0x63 page=0x07 ---- +cb_pmbus_write 9 0x63 0x00 0x07 +cb_pmbus_write 9 0x63 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 9 0x63 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 9 0x63 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 9 0x63 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 9 0x63 0x00 0x07 +cb_pmbus_write 9 0x63 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x63 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x63 0x00 0x07 +cb_pmbus_read 9 0x63 0x8b 2 # READ_VOUT read-back + +``` + +### 7.8 Blanton_SWB1_CONN16 (CB F3 Ch9) + +LTC2977:`0x64` = CH0~CH7,`0x65` = CH8~CH15(`CHIPS` 的 bus 欄位在 swb 下不使用) + +#### `margin_init Blanton_SWB1_CONN16` + +```bash +cb_i2c_init 9 0x88 0x00 # prescale 100kHz + MOD_EN (_swb_setup,整段 session 只做一次) +cb_pmbus_read 9 0x64 0x00 1 # probe LTC2977[0] 是否 ACK(MARGIN_SWB_PROBE=1) +cb_pmbus_read 9 0x65 0x00 1 # probe LTC2977[1] 是否 ACK(MARGIN_SWB_PROBE=1) +# 之後 CB_I2C_AUTO_INIT=0,每筆 transfer 不再重跑 prescale/enable +``` + +#### `margin_status` + +```bash +cb_pmbus_write 9 0x64 0x00 0x00 # PAGE = 0x00 (CH0 PVDD1V5_0, Vnom=1.5) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x64 0x00 0x01 # PAGE = 0x01 (CH1 P1V8_4, Vnom=1.8) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x64 0x00 0x02 # PAGE = 0x02 (CH2 PVDD3_3V_SYNTH_LDO_B5, Vnom=3.3) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x64 0x00 0x03 # PAGE = 0x03 (CH3 PVDD3_3V_SYNTH_LDO_A5, Vnom=3.3) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x64 0x00 0x04 # PAGE = 0x04 (CH4 PVDD3_3V_SYNTH_LDO_B4, Vnom=3.3) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x64 0x00 0x05 # PAGE = 0x05 (CH5 PVDD3_3V_SYNTH_LDO_A4, Vnom=3.3) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x64 0x00 0x06 # PAGE = 0x06 (CH6 P3V3, Vnom=3.3) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x64 0x00 0x07 # PAGE = 0x07 (CH7 PVDD0_8V_T3, Vnom=0.8) +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x00 # PAGE = 0x00 (CH8 P0V75_DVDD_1, Vnom=0.75) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x01 # PAGE = 0x01 (CH9 P0V75_AVDD_1, Vnom=0.75) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x02 # PAGE = 0x02 (CH10 P1V5_AVDD_1, Vnom=1.5) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x03 # PAGE = 0x03 (CH11 P0V9_AVDD_1, Vnom=0.9) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x04 # PAGE = 0x04 (CH12 PVDD0V9_0, Vnom=0.9) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x05 # PAGE = 0x05 (CH13 PVDD0V9_1, Vnom=0.9) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x06 # PAGE = 0x06 (CH14 PVDD0V9_3, Vnom=0.9) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +cb_pmbus_write 9 0x65 0x00 0x07 # PAGE = 0x07 (CH15 PVDD1V2_T3, Vnom=1.2) +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT +``` + +#### `margin_apply_profile profiles/combo_high3.conf` + +```bash +# ---- CH0 PVDD1V5_0 Vnom=1.5 chip=0x64 page=0x00 ---- +cb_pmbus_write 9 0x64 0x00 0x00 +cb_pmbus_write 9 0x64 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 9 0x64 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 9 0x64 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 9 0x64 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 9 0x64 0x00 0x00 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x00 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH1 P1V8_4 Vnom=1.8 chip=0x64 page=0x01 ---- +cb_pmbus_write 9 0x64 0x00 0x01 +cb_pmbus_write 9 0x64 0x25 0x53 0x3b # VOUT_MARGIN_HIGH 0x3b53 -> 1.8539 V +cb_pmbus_write 9 0x64 0x26 0xdf 0x37 # VOUT_MARGIN_LOW 0x37df -> 1.7460 V +cb_pmbus_write 9 0x64 0x40 0x7a 0x3c # VOUT_OV_FAULT_LIMIT 0x3c7a -> 1.8899 V +cb_pmbus_write 9 0x64 0x44 0xb8 0x36 # VOUT_UV_FAULT_LIMIT 0x36b8 -> 1.7100 V +cb_pmbus_write 9 0x64 0x00 0x01 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x01 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH2 PVDD3_3V_SYNTH_LDO_B5 Vnom=3.3 chip=0x64 page=0x02 ---- +cb_pmbus_write 9 0x64 0x00 0x02 +cb_pmbus_write 9 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 9 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 9 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 9 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 9 0x64 0x00 0x02 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x02 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH3 PVDD3_3V_SYNTH_LDO_A5 Vnom=3.3 chip=0x64 page=0x03 ---- +cb_pmbus_write 9 0x64 0x00 0x03 +cb_pmbus_write 9 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 9 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 9 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 9 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 9 0x64 0x00 0x03 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x03 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH4 PVDD3_3V_SYNTH_LDO_B4 Vnom=3.3 chip=0x64 page=0x04 ---- +cb_pmbus_write 9 0x64 0x00 0x04 +cb_pmbus_write 9 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 9 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 9 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 9 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 9 0x64 0x00 0x04 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x04 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH5 PVDD3_3V_SYNTH_LDO_A4 Vnom=3.3 chip=0x64 page=0x05 ---- +cb_pmbus_write 9 0x64 0x00 0x05 +cb_pmbus_write 9 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 9 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 9 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 9 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 9 0x64 0x00 0x05 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x05 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH6 P3V3 Vnom=3.3 chip=0x64 page=0x06 ---- +cb_pmbus_write 9 0x64 0x00 0x06 +cb_pmbus_write 9 0x64 0x25 0xc4 0x6c # VOUT_MARGIN_HIGH 0x6cc4 -> 3.3989 V +cb_pmbus_write 9 0x64 0x26 0x6e 0x66 # VOUT_MARGIN_LOW 0x666e -> 3.2009 V +cb_pmbus_write 9 0x64 0x40 0xe1 0x6e # VOUT_OV_FAULT_LIMIT 0x6ee1 -> 3.4650 V +cb_pmbus_write 9 0x64 0x44 0x51 0x64 # VOUT_UV_FAULT_LIMIT 0x6451 -> 3.1349 V +cb_pmbus_write 9 0x64 0x00 0x06 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x06 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH7 PVDD0_8V_T3 Vnom=0.8 chip=0x64 page=0x07 ---- +cb_pmbus_write 9 0x64 0x00 0x07 +cb_pmbus_write 9 0x64 0x25 0x5e 0x1a # VOUT_MARGIN_HIGH 0x1a5e -> 0.8240 V +cb_pmbus_write 9 0x64 0x26 0xd4 0x18 # VOUT_MARGIN_LOW 0x18d4 -> 0.7759 V +cb_pmbus_write 9 0x64 0x40 0xe1 0x1a # VOUT_OV_FAULT_LIMIT 0x1ae1 -> 0.8400 V +cb_pmbus_write 9 0x64 0x44 0x51 0x18 # VOUT_UV_FAULT_LIMIT 0x1851 -> 0.7599 V +cb_pmbus_write 9 0x64 0x00 0x07 +cb_pmbus_write 9 0x64 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x64 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x64 0x00 0x07 +cb_pmbus_read 9 0x64 0x8b 2 # READ_VOUT read-back + +# ---- CH8 P0V75_DVDD_1 Vnom=0.75 chip=0x65 page=0x00 ---- +cb_pmbus_write 9 0x65 0x00 0x00 +cb_pmbus_write 9 0x65 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 9 0x65 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 9 0x65 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 9 0x65 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 9 0x65 0x00 0x00 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x00 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH9 P0V75_AVDD_1 Vnom=0.75 chip=0x65 page=0x01 ---- +cb_pmbus_write 9 0x65 0x00 0x01 +cb_pmbus_write 9 0x65 0x25 0xb8 0x18 # VOUT_MARGIN_HIGH 0x18b8 -> 0.7725 V +cb_pmbus_write 9 0x65 0x26 0x47 0x17 # VOUT_MARGIN_LOW 0x1747 -> 0.7274 V +cb_pmbus_write 9 0x65 0x40 0x33 0x19 # VOUT_OV_FAULT_LIMIT 0x1933 -> 0.7875 V +cb_pmbus_write 9 0x65 0x44 0xcc 0x16 # VOUT_UV_FAULT_LIMIT 0x16cc -> 0.7124 V +cb_pmbus_write 9 0x65 0x00 0x01 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x01 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH10 P1V5_AVDD_1 Vnom=1.5 chip=0x65 page=0x02 ---- +cb_pmbus_write 9 0x65 0x00 0x02 +cb_pmbus_write 9 0x65 0x25 0x70 0x31 # VOUT_MARGIN_HIGH 0x3170 -> 1.5449 V +cb_pmbus_write 9 0x65 0x26 0x8f 0x2e # VOUT_MARGIN_LOW 0x2e8f -> 1.4550 V +cb_pmbus_write 9 0x65 0x40 0x66 0x32 # VOUT_OV_FAULT_LIMIT 0x3266 -> 1.5750 V +cb_pmbus_write 9 0x65 0x44 0x99 0x2d # VOUT_UV_FAULT_LIMIT 0x2d99 -> 1.4249 V +cb_pmbus_write 9 0x65 0x00 0x02 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x02 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH11 P0V9_AVDD_1 Vnom=0.9 chip=0x65 page=0x03 ---- +cb_pmbus_write 9 0x65 0x00 0x03 +cb_pmbus_write 9 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 9 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 9 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 9 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 9 0x65 0x00 0x03 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x03 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH12 PVDD0V9_0 Vnom=0.9 chip=0x65 page=0x04 ---- +cb_pmbus_write 9 0x65 0x00 0x04 +cb_pmbus_write 9 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 9 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 9 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 9 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 9 0x65 0x00 0x04 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x04 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH13 PVDD0V9_1 Vnom=0.9 chip=0x65 page=0x05 ---- +cb_pmbus_write 9 0x65 0x00 0x05 +cb_pmbus_write 9 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 9 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 9 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 9 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 9 0x65 0x00 0x05 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x05 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH14 PVDD0V9_3 Vnom=0.9 chip=0x65 page=0x06 ---- +cb_pmbus_write 9 0x65 0x00 0x06 +cb_pmbus_write 9 0x65 0x25 0xa9 0x1d # VOUT_MARGIN_HIGH 0x1da9 -> 0.9269 V +cb_pmbus_write 9 0x65 0x26 0xef 0x1b # VOUT_MARGIN_LOW 0x1bef -> 0.8729 V +cb_pmbus_write 9 0x65 0x40 0x3d 0x1e # VOUT_OV_FAULT_LIMIT 0x1e3d -> 0.9449 V +cb_pmbus_write 9 0x65 0x44 0x5c 0x1b # VOUT_UV_FAULT_LIMIT 0x1b5c -> 0.8550 V +cb_pmbus_write 9 0x65 0x00 0x06 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x06 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +# ---- CH15 PVDD1V2_T3 Vnom=1.2 chip=0x65 page=0x07 ---- +cb_pmbus_write 9 0x65 0x00 0x07 +cb_pmbus_write 9 0x65 0x25 0x8d 0x27 # VOUT_MARGIN_HIGH 0x278d -> 1.2360 V +cb_pmbus_write 9 0x65 0x26 0x3f 0x25 # VOUT_MARGIN_LOW 0x253f -> 1.1639 V +cb_pmbus_write 9 0x65 0x40 0x51 0x28 # VOUT_OV_FAULT_LIMIT 0x2851 -> 1.2599 V +cb_pmbus_write 9 0x65 0x44 0x7a 0x24 # VOUT_UV_FAULT_LIMIT 0x247a -> 1.1399 V +cb_pmbus_write 9 0x65 0x00 0x07 +cb_pmbus_write 9 0x65 0x02 0x1a # ON_OFF_CONFIG: clear use_control +cb_pmbus_write 9 0x65 0x01 0xa8 # OPERATION = margin high +sleep 0.3 # MARGIN_SETTLE +cb_pmbus_write 9 0x65 0x00 0x07 +cb_pmbus_read 9 0x65 0x8b 2 # READ_VOUT read-back + +``` + +### 7.9 一次跑完八張板的順序提醒 + +上面八組如果連續執行,`margin_init` 每次都會重新 `cb_i2c_init` 該 conf 的 channel; +同一條 channel 上的兩張板(如 Ch6 的 CONN13/CONN14)切換時不需要額外動作, +因為 PAGE 與 slave 位址都在每筆 transfer 裡指定。若中途出現 NACK,先用 +`margin_swb_probe` 確認位址、再用 `margin_swb_reset`(`cb_i2c_reset` + `cb_i2c_init`)救 bus。 + +> `profiles/` 底下 8 張板共用同一份 `combo_high3.conf`(全 channel high +3%), +> 但寫入的 LINEAR16 值依各 conf 的 `CHn_VNOM` 而不同,已分別展開於上。 diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/margin.sh b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/margin.sh index 3e5ab4c..cad6f97 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/margin.sh +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/margin.sh @@ -5,6 +5,20 @@ # ============================================================================= # Version Control # ----------------------------------------------------------------------------- +# v2.6.0 SWB path actually wired to the shared CB I2C package. blanton_cb_i2c.sh +# and blanton_fpga_pcimem.sh live in the PARENT dir (Blanton_Script/), not +# next to margin.sh, so the backend is now searched in both places. +# Adds, for TRANSPORT=swb only (CB/i2c path untouched): +# * cb_i2c_init once in margin_init (prescale 0x88 = 100kHz) and +# CB_I2C_AUTO_INIT=0 afterwards -> 4 fewer pcimem writes per transfer +# * cb_pmbus_read presence probe of every LTC2977 in CHIPS +# * return-code checking on every cb_pmbus_read/write (NACK is reported +# instead of silently reading 0x0000) +# * DEBUG_MODE collision fix: blanton_fpga_pcimem.sh uses the same var +# name, so pcimem tracing is gated by MARGIN_SWB_PCIMEM_DEBUG +# * margin_swb_* wrappers (info/probe/scan/reset/sem) for debugging +# Physical map: CB F3 Ch6=SWB0 CONN13/14, Ch8=SWB0 CONN15/16, +# Ch7=SWB1 CONN13/14, Ch9=SWB1 CONN15/16 # v2.5.0 SWB margin support via a per-conf TRANSPORT layer. The SWB margin # boards are ALSO LTC2980 (2x LTC2977) -- same chip as CB -- just reached # through the CB FPGA F3 I2C master instead of a native bus. So the whole @@ -55,6 +69,37 @@ LOG_MODE=1 TRANSPORT="i2c" CB_I2C_CH="" +# --- SWB transport backend (blanton_cb_i2c.sh + blanton_fpga_pcimem.sh) ------- +# The SWB margin boards' LTC2980s hang off the CB FPGA Function 3 I2C master. +# Physical mapping (per bench wiring): +# CB F3 Ch6 -> SWB0 CONN13 / CONN14 +# CB F3 Ch8 -> SWB0 CONN15 / CONN16 +# CB F3 Ch7 -> SWB1 CONN13 / CONN14 +# CB F3 Ch9 -> SWB1 CONN15 / CONN16 +# Two CONNs share one FPGA I2C channel, so the two boards on a channel MUST use +# different LTC2977 slave addresses (the CHIPS array in each .conf). +MARGIN_SWB_CHANNELS="${MARGIN_SWB_CHANNELS:-6 7 8 9}" +# SCL prescale for cb_i2c_init: 0x88 = 100kHz, 0x24 = 400kHz (@75MHz core clk). +MARGIN_SWB_PRESCALE_LO="${MARGIN_SWB_PRESCALE_LO:-0x88}" +MARGIN_SWB_PRESCALE_HI="${MARGIN_SWB_PRESCALE_HI:-0x00}" +# 0 = cb_i2c_init once in margin_init, then CB_I2C_AUTO_INIT=0 so each +# cb_pmbus_* transfer skips the 4-register prescale/enable dance (much faster: +# margin_status all = 32 transfers). Set 1 to keep the package default (re-init +# on every transfer) if something else on the box reprograms the channel. +MARGIN_SWB_AUTO_INIT="${MARGIN_SWB_AUTO_INIT:-0}" +# 1 = grab the per-channel FPGA semaphore (cb_i2c_sem acquire) in margin_init and +# hold it for the whole session; margin_swb_sem_release frees it. Default off so +# margin never fails just because someone else holds it. +MARGIN_SWB_USE_SEM="${MARGIN_SWB_USE_SEM:-0}" +# 1 = probe every LTC2977 in CHIPS (PMBus PAGE read) at margin_init. +MARGIN_SWB_PROBE="${MARGIN_SWB_PROBE:-1}" +# 1 = also let blanton_fpga_pcimem.sh print every underlying pcimem command. +# Needed because that script's debug flag is ALSO called DEBUG_MODE; margin_debug +# would otherwise flood the console with pcimem lines. +MARGIN_SWB_PCIMEM_DEBUG="${MARGIN_SWB_PCIMEM_DEBUG:-0}" +_SWB_READY=0 +_SWB_SEM_HELD=0 + # Channel enable for margining. Rails the LTC2980 does not sequence (externally # enabled, e.g. an always-on MPQ8625 buck) sit with STATUS_WORD OFF=1 and won't # margin, because the servo DAC never soft-connects. Writing ON_OFF_CONFIG (0x02) @@ -131,6 +176,233 @@ margin_debug() { echo -e "[\033[34mINFO\033[0m] DEBUG_MODE=$DEBUG_MODE" } +# ============================================================================= +# SWB transport backend (TRANSPORT=swb only -- the CB/i2c path never gets here) +# ----------------------------------------------------------------------------- +# Wire ops come from the shared CB I2C package: +# blanton_fpga_pcimem.sh -> cb_fpga [data] (PCIe BAR via pcimem) +# blanton_cb_i2c.sh -> cb_i2c_init / cb_i2c_reset / cb_i2c_sem / +# cb_i2c_scan / cb_pmbus_read / cb_pmbus_write +# Both live in the parent Blanton_Script/ directory (a copy next to margin.sh is +# also honoured if you ever bundle one). +# ============================================================================= + +# Locate a backend script: next to margin.sh first, then the parent dir. +_swb_find_backend() { + local name="$1" p + for p in "$SCRIPT_DIR/$name" "$SCRIPT_DIR/../$name"; do + [ -f "$p" ] && { echo "$p"; return 0; } + done + return 1 +} + +# Source blanton_fpga_pcimem.sh (cb_fpga) + blanton_cb_i2c.sh (cb_pmbus_*). +_swb_backend_load() { + local f + if ! declare -F cb_fpga >/dev/null 2>&1; then + if f=$(_swb_find_backend "blanton_fpga_pcimem.sh"); then + # shellcheck source=/dev/null + source "$f" + echo -e "[\033[34mINFO\033[0m] SWB backend: sourced $f" + else + echo -e "[\033[31mERRO\033[0m] blanton_fpga_pcimem.sh not found in $SCRIPT_DIR or its parent" + return 1 + fi + fi + if ! declare -F cb_pmbus_read >/dev/null 2>&1; then + if f=$(_swb_find_backend "blanton_cb_i2c.sh"); then + # shellcheck source=/dev/null + source "$f" >/dev/null + echo -e "[\033[34mINFO\033[0m] SWB backend: sourced $f" + else + echo -e "[\033[31mERRO\033[0m] blanton_cb_i2c.sh not found in $SCRIPT_DIR or its parent" + return 1 + fi + fi + declare -F cb_pmbus_read >/dev/null 2>&1 || { + echo -e "[\033[31mERRO\033[0m] cb_pmbus_read still undefined after sourcing the backend"; return 1; } + return 0 +} + +# Run a cb_* command with pcimem tracing suppressed (shared DEBUG_MODE var). +# Echoes the command's stdout, preserves its return code. +_swb_call() { + local _saved="$DEBUG_MODE" _rc + [ "$MARGIN_SWB_PCIMEM_DEBUG" = "1" ] || DEBUG_MODE=0 + "$@" + _rc=$? + DEBUG_MODE="$_saved" + return $_rc +} + +# Probe one LTC2977: 1-byte PMBus read of PAGE (0x00). Returns cb_pmbus_read's rc. +_swb_probe_addr() { + _swb_call cb_pmbus_read "$CB_I2C_CH" "$1" 0x00 1 >/dev/null 2>&1 +} + +# --- SWB wire ops used by the transport switch below ------------------------ +# Both use _ADDR (LTC2977 7-bit slave) set by _get_chip and CB_I2C_CH from the +# .conf. Unlike i2cset/i2cget these report failures: a NACK on the FPGA I2C +# master used to silently turn into Vout=0.0000. + +# _swb_write [byte...] -> cb_pmbus_write (LSB first for LINEAR16) +_swb_write() { + local reg=$1; shift + [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] cb_pmbus_write $CB_I2C_CH $_ADDR $reg $*\033[0m" + if ! _swb_call cb_pmbus_write "$CB_I2C_CH" "$_ADDR" "$reg" "$@" >/dev/null 2>&1; then + echo -e "[\033[31mERRO\033[0m] cb_pmbus_write ch=$CB_I2C_CH $_ADDR reg=$reg failed (NACK/timeout)" >&2 + _log_detail "ERRO cb_pmbus_write ch=$CB_I2C_CH $_ADDR $reg $*" + return 1 + fi + return 0 +} + +# _swb_read_word -> echoes "0xXXXX" parsed out of cb_pmbus_read's "=> 0xXXXX" +_swb_read_word() { + local reg=$1 out word + [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] cb_pmbus_read $CB_I2C_CH $_ADDR $reg 2\033[0m" >&2 + if ! out=$(_swb_call cb_pmbus_read "$CB_I2C_CH" "$_ADDR" "$reg" 2 2>/dev/null); then + echo -e "[\033[31mERRO\033[0m] cb_pmbus_read ch=$CB_I2C_CH $_ADDR reg=$reg failed (NACK/timeout)" >&2 + _log_detail "ERRO cb_pmbus_read ch=$CB_I2C_CH $_ADDR $reg" + echo "0x0000" + return 1 + fi + # cb_pmbus_read prints " [PMB-R] ... => 0xXXXX raw=[...] linear16=..." + word=$(printf '%s' "$out" | awk -F'=> ' 'NF>1{print $2}' | awk '{print $1}') + [[ "$word" =~ ^0[xX][0-9a-fA-F]+$ ]] || word="0x0000" + echo "$word" +} + +# Bring up the FPGA I2C channel for this .conf: validate CB_I2C_CH, prescale + +# enable it once (cb_i2c_init), optionally take the semaphore, then probe CHIPS. +_swb_setup() { + _SWB_READY=0 + + if [ -z "$CB_I2C_CH" ]; then + echo -e "[\033[31mERRO\033[0m] TRANSPORT=swb but CB_I2C_CH is empty in the .conf" + return 1 + fi + if ! [[ "$CB_I2C_CH" =~ ^[0-9]+$ ]] || [ "$CB_I2C_CH" -gt 17 ]; then + echo -e "[\033[31mERRO\033[0m] CB_I2C_CH='$CB_I2C_CH' invalid (CB F3 I2C channels are 0..17)" + return 1 + fi + case " $MARGIN_SWB_CHANNELS " in + *" $CB_I2C_CH "*) ;; + *) echo -e "[\033[33mWARN\033[0m] CB_I2C_CH=$CB_I2C_CH is not a known SWB VRM channel ($MARGIN_SWB_CHANNELS)" ;; + esac + + # Prescale + MOD_EN on this channel. + if ! _swb_call cb_i2c_init "$CB_I2C_CH" "$MARGIN_SWB_PRESCALE_LO" "$MARGIN_SWB_PRESCALE_HI"; then + echo -e "[\033[31mERRO\033[0m] cb_i2c_init $CB_I2C_CH failed (FPGA/pcimem access?)" + return 1 + fi + CB_I2C_AUTO_INIT="$MARGIN_SWB_AUTO_INIT" + local _khz="?"; [ "$MARGIN_SWB_PRESCALE_LO" = "0x88" ] && _khz="100" + [ "$MARGIN_SWB_PRESCALE_LO" = "0x24" ] && _khz="400" + echo -e "[\033[34mINFO\033[0m] cb_i2c_init ch=$CB_I2C_CH prescale=$MARGIN_SWB_PRESCALE_LO/$MARGIN_SWB_PRESCALE_HI (~${_khz}kHz), CB_I2C_AUTO_INIT=$CB_I2C_AUTO_INIT" + _log "swb: cb_i2c_init ch=$CB_I2C_CH prescale=$MARGIN_SWB_PRESCALE_LO auto_init=$CB_I2C_AUTO_INIT" + + if [ "$MARGIN_SWB_USE_SEM" = "1" ]; then + if _swb_call cb_i2c_sem "$CB_I2C_CH" acquire; then + _SWB_SEM_HELD=1 + else + echo -e "[\033[33mWARN\033[0m] semaphore on ch=$CB_I2C_CH not acquired; continuing without it" + fi + fi + + _SWB_READY=1 + + if [ "$MARGIN_SWB_PROBE" = "1" ]; then + local idx=0 chip addr bad=0 + for chip in "${CHIPS[@]}"; do + IFS=':' read -r _ addr <<< "$chip" + if _swb_probe_addr "$addr"; then + echo -e "[\033[34mINFO\033[0m] probe ch=$CB_I2C_CH LTC2977[$idx] $addr : \033[32mACK\033[0m" + else + echo -e "[\033[33mWARN\033[0m] probe ch=$CB_I2C_CH LTC2977[$idx] $addr : \033[31mNACK\033[0m (wrong CB_I2C_CH / addr, board absent, or channel stuck -> margin_swb_scan / margin_swb_reset)" + bad=1 + fi + idx=$((idx+1)) + done + _log "swb: probe ch=$CB_I2C_CH chips=${CHIPS[*]} $( [ "$bad" = "0" ] && echo all-ACK || echo has-NACK )" + fi + return 0 +} + +# --- SWB debug / maintenance wrappers (thin shells over blanton_cb_i2c.sh) --- +_swb_guard() { + if [ "$TRANSPORT" != "swb" ]; then + echo -e "[\033[33mWARN\033[0m] current setting is TRANSPORT=$TRANSPORT (not swb); nothing to do" + return 1 + fi + declare -F cb_pmbus_read >/dev/null 2>&1 || { echo -e "[\033[31mERRO\033[0m] SWB backend not loaded; run margin_init first"; return 1; } + return 0 +} + +# margin_swb_info -- show the transport wiring of the loaded setting +margin_swb_info() { + echo "-------------" + echo "[$PART_NUMBER] transport" + echo "-------------" + echo " TRANSPORT : $TRANSPORT" + if [ "$TRANSPORT" = "swb" ]; then + echo " CB_I2C_CH : $CB_I2C_CH (CB FPGA F3, base $(printf '0x%X' $(( 0x300 + CB_I2C_CH * 0x20 ))))" + echo " LTC2977 : ${CHIPS[*]} (bus field unused on swb)" + echo " prescale : $MARGIN_SWB_PRESCALE_LO/$MARGIN_SWB_PRESCALE_HI auto_init=$CB_I2C_AUTO_INIT sem_held=$_SWB_SEM_HELD" + echo " wire ops : cb_pmbus_write $CB_I2C_CH 0x00 / cb_pmbus_read $CB_I2C_CH 0x8b 2" + else + echo " bus:addr : ${CHIPS[*]} (i2cset/i2cget)" + fi +} + +# margin_swb_probe -- re-run the PAGE-read presence check on every LTC2977 +margin_swb_probe() { + _swb_guard || return 1 + local idx=0 chip addr + for chip in "${CHIPS[@]}"; do + IFS=':' read -r _ addr <<< "$chip" + if _swb_probe_addr "$addr"; then + echo -e " ch=$CB_I2C_CH $addr : \033[32mACK\033[0m" + else + echo -e " ch=$CB_I2C_CH $addr : \033[31mNACK\033[0m" + fi + idx=$((idx+1)) + done +} + +# margin_swb_scan [ch] -- cb_i2c_scan on this conf's channel (0x08..0x77) +margin_swb_scan() { + _swb_guard || return 1 + _swb_call cb_i2c_scan "${1:-$CB_I2C_CH}" +} + +# margin_swb_reset -- local I2C controller reset (0xD) + re-init, for a stuck bus +margin_swb_reset() { + _swb_guard || return 1 + _swb_call cb_i2c_reset "$CB_I2C_CH" + _swb_call cb_i2c_init "$CB_I2C_CH" "$MARGIN_SWB_PRESCALE_LO" "$MARGIN_SWB_PRESCALE_HI" + echo -e "[\033[34mINFO\033[0m] ch=$CB_I2C_CH reset + re-init done" + _log "swb: cb_i2c_reset + cb_i2c_init ch=$CB_I2C_CH" +} + +# margin_swb_sem [status|acquire|release] +margin_swb_sem() { + _swb_guard || return 1 + local act="${1:-status}" + _swb_call cb_i2c_sem "$CB_I2C_CH" "$act" + case "$act" in + acquire) _SWB_SEM_HELD=1 ;; + release) _SWB_SEM_HELD=0 ;; + esac +} + +# margin_swb_sem_release -- release the session semaphore if margin_init took it +margin_swb_sem_release() { + [ "$_SWB_SEM_HELD" = "1" ] || { echo -e "[\033[34mINFO\033[0m] no semaphore held by this session"; return 0; } + _swb_call cb_i2c_sem "$CB_I2C_CH" release + _SWB_SEM_HELD=0 +} + # --- Init: load setting by name --- margin_init() { if [ -z "$1" ]; then @@ -150,15 +422,13 @@ margin_init() { TRANSPORT="${TRANSPORT:-i2c}" # a blank TRANSPORT="" in a .conf means i2c echo -e "[\033[34mINFO\033[0m] Loaded setting: $setting_file (transport=$TRANSPORT)" - # SWB rails need the cb_pmbus_* backend; source it on demand. - if [ "$TRANSPORT" = "swb" ] && ! declare -F cb_pmbus_read >/dev/null 2>&1; then - if [ -f "$SCRIPT_DIR/blanton_cb_i2c.sh" ]; then - # shellcheck source=/dev/null - source "$SCRIPT_DIR/blanton_cb_i2c.sh" - else - echo -e "[\033[31mERRO\033[0m] TRANSPORT=swb but blanton_cb_i2c.sh not found in $SCRIPT_DIR" - return 1 - fi + # SWB rails need the cb_pmbus_* backend (blanton_cb_i2c.sh + blanton_fpga_pcimem.sh, + # normally in the parent Blanton_Script/ dir); load it and bring the FPGA I2C + # channel up once. CB/i2c settings skip this entirely. + _SWB_READY=0; _SWB_SEM_HELD=0 + if [ "$TRANSPORT" = "swb" ]; then + _swb_backend_load || return 1 + _swb_setup || return 1 fi _log_start_session } @@ -221,8 +491,7 @@ _get_page() { # PAGE is written the same way on both (PMBus command 0x00). _open_page() { if [ "$TRANSPORT" = "swb" ]; then - [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] cb_pmbus_write $CB_I2C_CH $_ADDR 0x00 $1\033[0m" - cb_pmbus_write "$CB_I2C_CH" "$_ADDR" 0x00 "$1" >/dev/null 2>&1 + _swb_write 0x00 "$1" return fi [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] i2cset -y $_BUS $_ADDR 0x00 $1 b\033[0m" @@ -233,8 +502,7 @@ _open_page() { _i2c_write_word() { local reg=$1 lo=$2 hi=$3 if [ "$TRANSPORT" = "swb" ]; then - [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] cb_pmbus_write $CB_I2C_CH $_ADDR $reg $lo $hi\033[0m" - cb_pmbus_write "$CB_I2C_CH" "$_ADDR" "$reg" "$lo" "$hi" >/dev/null 2>&1 + _swb_write "$reg" "$lo" "$hi" return fi local word=$(( (hi << 8) | lo )) @@ -245,8 +513,7 @@ _i2c_write_word() { _i2c_write_byte() { if [ "$TRANSPORT" = "swb" ]; then - [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] cb_pmbus_write $CB_I2C_CH $_ADDR $1 $2\033[0m" - cb_pmbus_write "$CB_I2C_CH" "$_ADDR" "$1" "$2" >/dev/null 2>&1 + _swb_write "$1" "$2" return fi [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] i2cset -y $_BUS $_ADDR $1 $2 b\033[0m" @@ -256,13 +523,7 @@ _i2c_write_byte() { # Read a 16-bit word; echoes "0xXXXX". For swb, parse cb_pmbus_read's "=> 0xXXXX". _i2c_read_word() { if [ "$TRANSPORT" = "swb" ]; then - [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] cb_pmbus_read $CB_I2C_CH $_ADDR $1 2\033[0m" >&2 - local out word - out=$(cb_pmbus_read "$CB_I2C_CH" "$_ADDR" "$1" 2 2>/dev/null) - # cb_pmbus_read prints "... => 0xXXXX raw=[...] ..."; take the word after "=>". - word=$(printf '%s' "$out" | awk -F'=> ' 'NF>1{print $2}' | awk '{print $1}') - [[ "$word" =~ ^0[xX][0-9a-fA-F]+$ ]] || word="0x0000" - echo "$word" + _swb_read_word "$1" return fi [ "$DEBUG_MODE" = "1" ] && echo -e "\033[90m[DEBG] i2cget -y $_BUS $_ADDR $1 w\033[0m" >&2 diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN13.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN13.conf index 2f8665d..509206d 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN13.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN13.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=6 +CB_I2C_CH=6 # CB F3 Ch6 = SWB0 CONN13/CONN14 (shared with CONN14, addr must differ) # --- I2C Configuration --- diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN14.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN14.conf index 77b9545..8cad194 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN14.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN14.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=8 +CB_I2C_CH=6 # CB F3 Ch6 = SWB0 CONN13/CONN14 (shared with CONN13, addr must differ) # --- I2C Configuration --- diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN15.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN15.conf index 256e2e2..9c707ca 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN15.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN15.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=6 +CB_I2C_CH=8 # CB F3 Ch8 = SWB0 CONN15/CONN16 (shared with CONN16, addr must differ) # --- I2C Configuration --- diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN16.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN16.conf index 09c6da5..4984a2a 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN16.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB0_CONN16.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=8 +CB_I2C_CH=8 # CB F3 Ch8 = SWB0 CONN15/CONN16 (shared with CONN15, addr must differ) # --- I2C Configuration --- diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN13.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN13.conf index c414909..355f0c1 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN13.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN13.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=7 +CB_I2C_CH=7 # CB F3 Ch7 = SWB1 CONN13/CONN14 (shared with CONN14, addr must differ) # --- I2C Configuration --- diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN14.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN14.conf index b85fdc4..ce2efe5 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN14.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN14.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=9 +CB_I2C_CH=7 # CB F3 Ch7 = SWB1 CONN13/CONN14 (shared with CONN13, addr must differ) # --- I2C Configuration --- diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN15.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN15.conf index 97eef1b..c99677b 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN15.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN15.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=7 +CB_I2C_CH=9 # CB F3 Ch9 = SWB1 CONN15/CONN16 (shared with CONN16, addr must differ) # --- I2C Configuration --- diff --git a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN16.conf b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN16.conf index a620a77..6159181 100644 --- a/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN16.conf +++ b/src/Script_ABC_Blanton/Blanton_Script/LTC2980_Margin_Script/settings/Blanton_SWB1_CONN16.conf @@ -9,7 +9,7 @@ # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- TRANSPORT="swb" -CB_I2C_CH=9 +CB_I2C_CH=9 # CB F3 Ch9 = SWB1 CONN15/CONN16 (shared with CONN15, addr must differ) # --- I2C Configuration ---