feat(boot): Rename Script 5 to Boot Cycle, add a cold path and stop the log growing
The macro does warm and cold now, so "Reboot" was too narrow:
5_Blanton_Script_Reboot_Cycle.ttl -> 5_Blanton_Script_Boot_Cycle.ttl.
EN_Cold_Warm_boot in config.ttl picks which:
0 neither - for the A/B/C flow, where this macro is not used
1 reboot (warm), what the macro always did
2 cold, by writing the CB FPGA:
pcimem .../0000:05:00.0/resource0 0x480 w 0xD0000
Three things about that worth knowing before anyone runs it. Setting 0 and
then running this macro hangs it: nothing reboots, and the
wait "Booting in blind mode" underneath has no timeout, so it waits for a
boot that will never come. 0x480 is ICB_CTRL_REG in
docs/Blantons_FPGA_Registers.md and that table has no bit definitions for
it, nor is 0xD0000 written down anywhere in this repo. And the BDF
0000:05:00.0 is hard-coded, while blanton_fpga_pcimem.sh auto-detects the
CB FPGA precisely because it moves per unit - on a DUT where it is not at
05:00.0 this is a raw 32-bit write to an unknown register on some other
device. The cold path has not been run on hardware.
Separately, both stress logs are now removed before each run:
rm -rf /host/hw-eval/jobs/qfx5252-stress-{ssd,usb}.log
qfx5252-stress-* appends to its --log file and the macro cats the whole
thing afterwards, so every cycle printed back everything the cycles
before it had written. On the 199-cycle log from 2026-09-04 that was 289
lines at cycle 1 and 36,555 at cycle 199; at ~6.2 ms a line, which is
what a 115200 baud console costs, it accounts for +212 s of the +214 s
the cycle grew over the run. The stress itself is fixed at --runtime 30,
and the other eleven gaps between check points drifted by under 1.5 s
each. The DUT was never getting slower - the test was reading its own
history aloud, once per cycle.
Script A's header goes to V1.2.2 and its Version History covers all of
the above.
Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_014RetWKFZFG1ZHcitQAyhwM
This commit is contained in:
@@ -1,7 +1,7 @@
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; =============================================================================
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; =============================================================================
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; Script A for Blanton
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; Script A for Blanton
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; Version : V1.2.1
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; Version : V1.2.2
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; Date : 2026-09-08
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; Date : 2026-09-09
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; Author : ETWen
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; Author : ETWen
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; =============================================================================
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; =============================================================================
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; Version History:
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; Version History:
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@@ -562,6 +562,55 @@
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; concerned: once here and once inside ScriptC. Neither
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; concerned: once here and once inside ScriptC. Neither
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; can overlap blanton_traffic_linespeed or
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; can overlap blanton_traffic_linespeed or
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; blanton_tr518.sh - they all take over the same ports
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; blanton_tr518.sh - they all take over the same ports
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; V1.2.2 2026-09-09
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; 5_.._Boot_Cycle.ttl Renamed from 5_Blanton_Script_Reboot_Cycle.ttl
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; It does warm and cold now, so 'Reboot' was too narrow.
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; Same macro otherwise - git records it as a rename
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; 5_.._Boot_Cycle.ttl Warm or cold boot, chosen by EN_Cold_Warm_boot
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; 1 = 'reboot' (warm, what the macro always did). 2 = cold,
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; by writing the CB FPGA: pcimem
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; /sys/bus/pci/devices/0000:05:00.0/resource0 0x480 w
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; 0xD0000. 0 = neither
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; !! EN_Cold_Warm_boot = 0 hangs the macro. Neither branch
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; runs, so nothing reboots, and the 'wait "Booting in
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; blind mode"' underneath has no timeout - cycle 1
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; finishes and the macro then waits for a boot that will
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; never come. 0 is the value for the A/B/C flow, where
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; this macro is not used at all; do not run ScriptBoot
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; with it
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; !! 0x480 is ICB_CTRL_REG in
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; docs/Blantons_FPGA_Registers.md, and that table
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; carries no bit definitions for it. 0xD0000 is not
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; written down anywhere in this repo either. Whoever
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; knows what those bits do should put it in the register
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; doc before someone changes the value
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; !! the BDF 0000:05:00.0 is hard-coded here, while
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; blanton_fpga_pcimem.sh auto-detects the CB FPGA
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; precisely because it moves per unit (see the V1.0.x
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; notes and Key Constraints #4). On a DUT where the FPGA
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; is not at 05:00.0 this becomes a raw 32-bit write to
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; an unknown register on some other device. Verify the
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; BDF on every unit before running the cold path
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; !! NOT verified on hardware. The warm path has 199 cycles
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; behind it; the cold path has none
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; 5_.._Boot_Cycle.ttl Truncate the two stress logs before each run
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; rm -rf /host/hw-eval/jobs/qfx5252-stress-ssd.log and the
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; usb one, added ahead of each qfx5252-stress-* call
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; qfx5252-stress-* APPENDS to its --log file and the macro
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; cats the whole thing afterwards, so every cycle printed
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; back everything the ones before it had written
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; Measured on the 199 cycle log from 2026-09-04: cycle 1
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; printed 289 lines, cycle 199 printed 36,555. At ~6.2 ms a
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; line - which is what a 115200 baud console costs - that
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; is +212 s of the +214 s the cycle grew over the run. The
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; stress itself is fixed at --runtime 30, and the other
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; eleven segments between check points drifted by less than
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; 1.5 s each. The DUT was never getting slower; the test
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; was reading its own history aloud once per cycle
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; config.ttl Add EN_Cold_Warm_boot
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; 0 = normal test (A/B/C), 1 = reboot cycle, 2 = power
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; cycle. Default 0 so that opening the shared config cannot
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; reboot anyone's DUT by accident
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; =============================================================================
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; =============================================================================
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include "config.ttl"
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include "config.ttl"
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+13
-2
@@ -172,6 +172,8 @@ while 1
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sprintf2 strCKPt5 "echo -e '\033[36mCheck Pt5 : SSD Test\033[0m'"
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sprintf2 strCKPt5 "echo -e '\033[36mCheck Pt5 : SSD Test\033[0m'"
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sendln strCKPt5
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sendln strCKPt5
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wait prompt_sonic_root
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sendln "rm -rf /host/hw-eval/jobs/qfx5252-stress-ssd.log"
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wait prompt_sonic_root
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wait prompt_sonic_root
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sendln "qfx5252-stress-ssd 1G --runtime 30 --passes 2 --write --force --log /host/hw-eval/jobs/qfx5252-stress-ssd.log"
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sendln "qfx5252-stress-ssd 1G --runtime 30 --passes 2 --write --force --log /host/hw-eval/jobs/qfx5252-stress-ssd.log"
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wait prompt_sonic_root
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wait prompt_sonic_root
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@@ -189,6 +191,8 @@ while 1
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waitregex '<<DEV=([^>]*)>>'
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waitregex '<<DEV=([^>]*)>>'
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usb_dev = groupmatchstr1
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usb_dev = groupmatchstr1
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wait prompt_sonic_root
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sendln "rm -rf /host/hw-eval/jobs/qfx5252-stress-usb.log"
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wait prompt_sonic_root
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wait prompt_sonic_root
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sprintf2 cmd "qfx5252-stress-usb %s 256M --runtime 30 --passes 2 --write --log /host/hw-eval/jobs/qfx5252-stress-usb.log" usb_dev
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sprintf2 cmd "qfx5252-stress-usb %s 256M --runtime 30 --passes 2 --write --log /host/hw-eval/jobs/qfx5252-stress-usb.log" usb_dev
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sendln cmd
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sendln cmd
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@@ -412,8 +416,15 @@ while 1
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sendln "show uptime"
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sendln "show uptime"
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; ========== Show Power on uptime ==========
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; ========== Show Power on uptime ==========
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wait prompt_sonic_root
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if EN_Cold_Warm_boot = 1 then
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sendln "reboot"
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wait prompt_sonic_root
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sendln "reboot"
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elseif EN_Cold_Warm_boot = 2 then
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wait prompt_sonic_root
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sendln "pcimem /sys/bus/pci/devices/0000:05:00.0/resource0 0x480 w 0xD0000"
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else
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endif
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wait "Booting in blind mode"
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wait "Booting in blind mode"
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endwhile
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endwhile
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@@ -34,4 +34,13 @@ BMC_USB_RUNTIME = 172800 ; Unit seconds, 172800 = 2 days
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;================================================================
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;================================================================
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prompt_login = "sonic login:"
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prompt_login = "sonic login:"
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prompt_sonic = "admin@sonic:~$"
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prompt_sonic = "admin@sonic:~$"
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prompt_sonic_root = "root@sonic:~#"
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prompt_sonic_root = "root@sonic:~#"
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;================================================================
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; Reboot or Power Cycle
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;================================================================
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; 0: Normal Test
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; 1: Enable Reboot Cycle
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; 2: Enable Power Cycle
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EN_Cold_Warm_boot = 0
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