feat(boot): Rename Script 5 to Boot Cycle, add a cold path and stop the log growing

The macro does warm and cold now, so "Reboot" was too narrow:
5_Blanton_Script_Reboot_Cycle.ttl -> 5_Blanton_Script_Boot_Cycle.ttl.

EN_Cold_Warm_boot in config.ttl picks which:

  0  neither - for the A/B/C flow, where this macro is not used
  1  reboot (warm), what the macro always did
  2  cold, by writing the CB FPGA:
     pcimem .../0000:05:00.0/resource0 0x480 w 0xD0000

Three things about that worth knowing before anyone runs it. Setting 0 and
then running this macro hangs it: nothing reboots, and the
wait "Booting in blind mode" underneath has no timeout, so it waits for a
boot that will never come. 0x480 is ICB_CTRL_REG in
docs/Blantons_FPGA_Registers.md and that table has no bit definitions for
it, nor is 0xD0000 written down anywhere in this repo. And the BDF
0000:05:00.0 is hard-coded, while blanton_fpga_pcimem.sh auto-detects the
CB FPGA precisely because it moves per unit - on a DUT where it is not at
05:00.0 this is a raw 32-bit write to an unknown register on some other
device. The cold path has not been run on hardware.

Separately, both stress logs are now removed before each run:

  rm -rf /host/hw-eval/jobs/qfx5252-stress-{ssd,usb}.log

qfx5252-stress-* appends to its --log file and the macro cats the whole
thing afterwards, so every cycle printed back everything the cycles
before it had written. On the 199-cycle log from 2026-09-04 that was 289
lines at cycle 1 and 36,555 at cycle 199; at ~6.2 ms a line, which is
what a 115200 baud console costs, it accounts for +212 s of the +214 s
the cycle grew over the run. The stress itself is fixed at --runtime 30,
and the other eleven gaps between check points drifted by under 1.5 s
each. The DUT was never getting slower - the test was reading its own
history aloud, once per cycle.

Script A's header goes to V1.2.2 and its Version History covers all of
the above.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_014RetWKFZFG1ZHcitQAyhwM
This commit is contained in:
2026-09-09 09:14:09 +08:00
co-authored by Claude Opus 5
parent 7a1967bc9a
commit f5694345fb
3 changed files with 74 additions and 5 deletions
+51 -2
View File
@@ -1,7 +1,7 @@
; ============================================================================= ; =============================================================================
; Script A for Blanton ; Script A for Blanton
; Version : V1.2.1 ; Version : V1.2.2
; Date : 2026-09-08 ; Date : 2026-09-09
; Author : ETWen ; Author : ETWen
; ============================================================================= ; =============================================================================
; Version History: ; Version History:
@@ -562,6 +562,55 @@
; concerned: once here and once inside ScriptC. Neither ; concerned: once here and once inside ScriptC. Neither
; can overlap blanton_traffic_linespeed or ; can overlap blanton_traffic_linespeed or
; blanton_tr518.sh - they all take over the same ports ; blanton_tr518.sh - they all take over the same ports
; V1.2.2 2026-09-09
; 5_.._Boot_Cycle.ttl Renamed from 5_Blanton_Script_Reboot_Cycle.ttl
; It does warm and cold now, so 'Reboot' was too narrow.
; Same macro otherwise - git records it as a rename
; 5_.._Boot_Cycle.ttl Warm or cold boot, chosen by EN_Cold_Warm_boot
; 1 = 'reboot' (warm, what the macro always did). 2 = cold,
; by writing the CB FPGA: pcimem
; /sys/bus/pci/devices/0000:05:00.0/resource0 0x480 w
; 0xD0000. 0 = neither
; !! EN_Cold_Warm_boot = 0 hangs the macro. Neither branch
; runs, so nothing reboots, and the 'wait "Booting in
; blind mode"' underneath has no timeout - cycle 1
; finishes and the macro then waits for a boot that will
; never come. 0 is the value for the A/B/C flow, where
; this macro is not used at all; do not run ScriptBoot
; with it
; !! 0x480 is ICB_CTRL_REG in
; docs/Blantons_FPGA_Registers.md, and that table
; carries no bit definitions for it. 0xD0000 is not
; written down anywhere in this repo either. Whoever
; knows what those bits do should put it in the register
; doc before someone changes the value
; !! the BDF 0000:05:00.0 is hard-coded here, while
; blanton_fpga_pcimem.sh auto-detects the CB FPGA
; precisely because it moves per unit (see the V1.0.x
; notes and Key Constraints #4). On a DUT where the FPGA
; is not at 05:00.0 this becomes a raw 32-bit write to
; an unknown register on some other device. Verify the
; BDF on every unit before running the cold path
; !! NOT verified on hardware. The warm path has 199 cycles
; behind it; the cold path has none
; 5_.._Boot_Cycle.ttl Truncate the two stress logs before each run
; rm -rf /host/hw-eval/jobs/qfx5252-stress-ssd.log and the
; usb one, added ahead of each qfx5252-stress-* call
; qfx5252-stress-* APPENDS to its --log file and the macro
; cats the whole thing afterwards, so every cycle printed
; back everything the ones before it had written
; Measured on the 199 cycle log from 2026-09-04: cycle 1
; printed 289 lines, cycle 199 printed 36,555. At ~6.2 ms a
; line - which is what a 115200 baud console costs - that
; is +212 s of the +214 s the cycle grew over the run. The
; stress itself is fixed at --runtime 30, and the other
; eleven segments between check points drifted by less than
; 1.5 s each. The DUT was never getting slower; the test
; was reading its own history aloud once per cycle
; config.ttl Add EN_Cold_Warm_boot
; 0 = normal test (A/B/C), 1 = reboot cycle, 2 = power
; cycle. Default 0 so that opening the shared config cannot
; reboot anyone's DUT by accident
; ============================================================================= ; =============================================================================
include "config.ttl" include "config.ttl"
@@ -172,6 +172,8 @@ while 1
sprintf2 strCKPt5 "echo -e '\033[36mCheck Pt5 : SSD Test\033[0m'" sprintf2 strCKPt5 "echo -e '\033[36mCheck Pt5 : SSD Test\033[0m'"
sendln strCKPt5 sendln strCKPt5
wait prompt_sonic_root
sendln "rm -rf /host/hw-eval/jobs/qfx5252-stress-ssd.log"
wait prompt_sonic_root wait prompt_sonic_root
sendln "qfx5252-stress-ssd 1G --runtime 30 --passes 2 --write --force --log /host/hw-eval/jobs/qfx5252-stress-ssd.log" sendln "qfx5252-stress-ssd 1G --runtime 30 --passes 2 --write --force --log /host/hw-eval/jobs/qfx5252-stress-ssd.log"
wait prompt_sonic_root wait prompt_sonic_root
@@ -189,6 +191,8 @@ while 1
waitregex '<<DEV=([^>]*)>>' waitregex '<<DEV=([^>]*)>>'
usb_dev = groupmatchstr1 usb_dev = groupmatchstr1
wait prompt_sonic_root
sendln "rm -rf /host/hw-eval/jobs/qfx5252-stress-usb.log"
wait prompt_sonic_root wait prompt_sonic_root
sprintf2 cmd "qfx5252-stress-usb %s 256M --runtime 30 --passes 2 --write --log /host/hw-eval/jobs/qfx5252-stress-usb.log" usb_dev sprintf2 cmd "qfx5252-stress-usb %s 256M --runtime 30 --passes 2 --write --log /host/hw-eval/jobs/qfx5252-stress-usb.log" usb_dev
sendln cmd sendln cmd
@@ -412,8 +416,15 @@ while 1
sendln "show uptime" sendln "show uptime"
; ========== Show Power on uptime ========== ; ========== Show Power on uptime ==========
wait prompt_sonic_root if EN_Cold_Warm_boot = 1 then
sendln "reboot" wait prompt_sonic_root
sendln "reboot"
elseif EN_Cold_Warm_boot = 2 then
wait prompt_sonic_root
sendln "pcimem /sys/bus/pci/devices/0000:05:00.0/resource0 0x480 w 0xD0000"
else
endif
wait "Booting in blind mode" wait "Booting in blind mode"
endwhile endwhile
+10 -1
View File
@@ -34,4 +34,13 @@ BMC_USB_RUNTIME = 172800 ; Unit seconds, 172800 = 2 days
;================================================================ ;================================================================
prompt_login = "sonic login:" prompt_login = "sonic login:"
prompt_sonic = "admin@sonic:~$" prompt_sonic = "admin@sonic:~$"
prompt_sonic_root = "root@sonic:~#" prompt_sonic_root = "root@sonic:~#"
;================================================================
; Reboot or Power Cycle
;================================================================
; 0: Normal Test
; 1: Enable Reboot Cycle
; 2: Enable Power Cycle
EN_Cold_Warm_boot = 0