docs(margin): Realign channel-pairing comments with bench wiring

The values were corrected in ababb2c but every comment describing the
pairing still said the old one, leaving four confs where the comment
contradicted the line it sat on:

    CB_I2C_CH=8           # CB F3 Ch6 = SWB0 CONN13/CONN14 ...

That reads as a typo waiting to be "fixed" back to 6, which would undo
a bench-verified value. Comments now state the real pairing:

    Ch6 = SWB0 CONN14/CONN16    Ch8 = SWB0 CONN13/CONN15
    Ch7 = SWB1 CONN14/CONN16    Ch9 = SWB1 CONN13/CONN15

Same map corrected in margin.sh's header (two places).

Ref/margin_command_trace.md gets a staleness banner rather than an
edit. Its 1223 expanded cb_pmbus_* commands were generated from the old
values - 487 of them use addresses that no longer exist (0x5D, 0x5F,
0x63, 0x65) - so patching the headings would leave the bodies wrong and
look authoritative. The banner carries the correct table and says the
SWB chapters need regenerating; chapters 1-4 are transport-independent
and remain valid.

Comments only: no CB_I2C_CH value and no CHIPS address was touched.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_014RetWKFZFG1ZHcitQAyhwM
This commit is contained in:
2026-08-19 12:19:44 +08:00
co-authored by Claude Opus 5
parent ababb2c3d1
commit fedf697977
10 changed files with 36 additions and 14 deletions
@@ -1,5 +1,27 @@
# margin.sh 實際下線指令追蹤 (Command Trace) # margin.sh 實際下線指令追蹤 (Command Trace)
> ## ⚠️ 過期警告(2026-08-19)
>
> **本文件第 5~7 章的 SWB 指令追蹤已與現況不符,請勿照抄。**
> 上機驗證後 SWB 的 channel 配對與 LTC2977 位址都改了(commit `ababb2c`),
> 但本文件的 1223 條 `cb_pmbus_*` 指令是當時依舊值展開的,其中 487 條用到
> 已不存在的位址(`0x5D` / `0x5F` / `0x63` / `0x65`)。
>
> **正解以 `settings/*.conf` 為準:**
>
> | Channel | 板/接頭 | LTC2977 位址 |
> |---|---|---|
> | Ch6 | SWB0 CONN14 / CONN16 | CONN14 `0x5C`,`0x5E` ; CONN16 `0x62`,`0x64` |
> | Ch8 | SWB0 CONN13 / CONN15 | CONN13 `0x5C`,`0x5E` ; CONN15 `0x62`,`0x64` |
> | Ch7 | SWB1 CONN14 / CONN16 | CONN14 `0x5C`,`0x5E` ; CONN16 `0x62`,`0x64` |
> | Ch9 | SWB1 CONN13 / CONN15 | CONN13 `0x5C`,`0x5E` ; CONN15 `0x62`,`0x64` |
>
> 位址在同一顆 LTC2980 內是 **+2** 遞增(7-bit,由規格書 8-bit 配對除以 2 而來),
> 不是舊文件寫的 +1。原先記錄的 Ch6 上 `0x5E` 相撞問題已隨這次修正消失。
>
> 第 1~4 章(CB / i2c 路徑、暫存器語意、LINEAR16 換算)不受影響,仍然有效。
> 需要正確的 SWB 指令追蹤請重新產生本文件。
對象:`LTC2980_Margin_Script/margin.sh` v2.6.0 對象:`LTC2980_Margin_Script/margin.sh` v2.6.0
產生日期:2026-08-18 產生日期:2026-08-18
用途:紀錄每個 margin 指令在 I2C / PMBus 線上真正下了什麼,方便對照 log、 用途:紀錄每個 margin 指令在 I2C / PMBus 線上真正下了什麼,方便對照 log、
@@ -17,8 +17,8 @@
# * DEBUG_MODE collision fix: blanton_fpga_pcimem.sh uses the same var # * DEBUG_MODE collision fix: blanton_fpga_pcimem.sh uses the same var
# name, so pcimem tracing is gated by MARGIN_SWB_PCIMEM_DEBUG # name, so pcimem tracing is gated by MARGIN_SWB_PCIMEM_DEBUG
# * margin_swb_* wrappers (info/probe/scan/reset/sem) for debugging # * margin_swb_* wrappers (info/probe/scan/reset/sem) for debugging
# Physical map: CB F3 Ch6=SWB0 CONN13/14, Ch8=SWB0 CONN15/16, # Physical map: CB F3 Ch6=SWB0 CONN14/16, Ch8=SWB0 CONN13/15,
# Ch7=SWB1 CONN13/14, Ch9=SWB1 CONN15/16 # Ch7=SWB1 CONN14/16, Ch9=SWB1 CONN13/15
# v2.5.0 SWB margin support via a per-conf TRANSPORT layer. The SWB margin # v2.5.0 SWB margin support via a per-conf TRANSPORT layer. The SWB margin
# boards are ALSO LTC2980 (2x LTC2977) -- same chip as CB -- just reached # boards are ALSO LTC2980 (2x LTC2977) -- same chip as CB -- just reached
# through the CB FPGA F3 I2C master instead of a native bus. So the whole # through the CB FPGA F3 I2C master instead of a native bus. So the whole
@@ -72,10 +72,10 @@ CB_I2C_CH=""
# --- SWB transport backend (blanton_cb_i2c.sh + blanton_fpga_pcimem.sh) ------- # --- SWB transport backend (blanton_cb_i2c.sh + blanton_fpga_pcimem.sh) -------
# The SWB margin boards' LTC2980s hang off the CB FPGA Function 3 I2C master. # The SWB margin boards' LTC2980s hang off the CB FPGA Function 3 I2C master.
# Physical mapping (per bench wiring): # Physical mapping (per bench wiring):
# CB F3 Ch6 -> SWB0 CONN13 / CONN14 # CB F3 Ch6 -> SWB0 CONN14 / CONN16
# CB F3 Ch8 -> SWB0 CONN15 / CONN16 # CB F3 Ch8 -> SWB0 CONN13 / CONN15
# CB F3 Ch7 -> SWB1 CONN13 / CONN14 # CB F3 Ch7 -> SWB1 CONN14 / CONN16
# CB F3 Ch9 -> SWB1 CONN15 / CONN16 # CB F3 Ch9 -> SWB1 CONN13 / CONN15
# Two CONNs share one FPGA I2C channel, so the two boards on a channel MUST use # Two CONNs share one FPGA I2C channel, so the two boards on a channel MUST use
# different LTC2977 slave addresses (the CHIPS array in each .conf). # different LTC2977 slave addresses (the CHIPS array in each .conf).
MARGIN_SWB_CHANNELS="${MARGIN_SWB_CHANNELS:-6 7 8 9}" MARGIN_SWB_CHANNELS="${MARGIN_SWB_CHANNELS:-6 7 8 9}"
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=8 # CB F3 Ch6 = SWB0 CONN13/CONN14 (shared with CONN14, addr must differ) CB_I2C_CH=8 # CB F3 Ch8 = SWB0 CONN13/CONN15 (shared with CONN15, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=6 # CB F3 Ch6 = SWB0 CONN13/CONN14 (shared with CONN13, addr must differ) CB_I2C_CH=6 # CB F3 Ch6 = SWB0 CONN14/CONN16 (shared with CONN16, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=8 # CB F3 Ch8 = SWB0 CONN15/CONN16 (shared with CONN16, addr must differ) CB_I2C_CH=8 # CB F3 Ch8 = SWB0 CONN13/CONN15 (shared with CONN13, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=6 # CB F3 Ch8 = SWB0 CONN15/CONN16 (shared with CONN15, addr must differ) CB_I2C_CH=6 # CB F3 Ch6 = SWB0 CONN14/CONN16 (shared with CONN14, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=9 # CB F3 Ch7 = SWB1 CONN13/CONN14 (shared with CONN14, addr must differ) CB_I2C_CH=9 # CB F3 Ch9 = SWB1 CONN13/CONN15 (shared with CONN15, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=7 # CB F3 Ch7 = SWB1 CONN13/CONN14 (shared with CONN13, addr must differ) CB_I2C_CH=7 # CB F3 Ch7 = SWB1 CONN14/CONN16 (shared with CONN16, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=9 # CB F3 Ch9 = SWB1 CONN15/CONN16 (shared with CONN16, addr must differ) CB_I2C_CH=9 # CB F3 Ch9 = SWB1 CONN13/CONN15 (shared with CONN13, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---
@@ -9,7 +9,7 @@
# --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach # --- SWB transport (added): this LTC2980 sits behind the CB FPGA F3 I2C; reach
# it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. --- # it with cb_pmbus, not i2cset. CB_I2C_CH = FPGA I2C channel for this CONN. ---
TRANSPORT="swb" TRANSPORT="swb"
CB_I2C_CH=7 # CB F3 Ch9 = SWB1 CONN15/CONN16 (shared with CONN15, addr must differ) CB_I2C_CH=7 # CB F3 Ch7 = SWB1 CONN14/CONN16 (shared with CONN14, addr must differ)
# --- I2C Configuration --- # --- I2C Configuration ---