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9cc41f6fbd |
+14
-3
@@ -202,7 +202,9 @@ Blanton_TTL_Script/
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├── margin.sh # margin_init/status/set/apply_profile/save
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├── margin.sh # margin_init/status/set/apply_profile/save
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# # v2.7.0:margin_save all / margin_save blanton
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# # v2.7.0:margin_save all / margin_save blanton
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├── settings/*.conf # 一個 .conf = 一顆 LTC2980(CB + SWB0/1 × CONN13~16)
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├── settings/*.conf # 一個 .conf = 一顆 LTC2980(CB + SWB0/1 × CONN13~16)
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├── profiles/*.conf # 16-ch 批次組合(comboA/B、high3/5、low3/5、normal、off)
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├── profiles/*.conf # 16-ch 批次組合。SWB 為 per-CONN:
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# # combo_SWB_CONN13~16_{high,low}(百分比對應該片的軌)
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# # 通用:high3/5、low3/5、normal、all_off
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├── script/*_all.sh # 跨 9 顆 LTC2980 的批次 status / apply / save
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├── script/*_all.sh # 跨 9 顆 LTC2980 的批次 status / apply / save
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├── Ref/margin_command_trace.md # 指令追蹤參考(SWB 章節已標過期,見文件內警告)
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├── Ref/margin_command_trace.md # 指令追蹤參考(SWB 章節已標過期,見文件內警告)
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└── logs/ # margin 操作 log
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└── logs/ # margin 操作 log
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@@ -243,11 +245,20 @@ Log 檔名規則:`<mdir>\Logs\<project_name>_<strTestcase>_<YYYYmmdd-HHMMSS>.l
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| `CB_I2C_CH` | int | `TRANSPORT="swb"` 時的 FPGA I2C 通道(6/7/8/9) |
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| `CB_I2C_CH` | int | `TRANSPORT="swb"` 時的 FPGA I2C 通道(6/7/8/9) |
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| `CHIPS[]` | string[2] | `"bus:addr"`,index 0 → CH0~7、index 1 → CH8~15 |
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| `CHIPS[]` | string[2] | `"bus:addr"`,index 0 → CH0~7、index 1 → CH8~15 |
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| `CHIP_PRE_CMD[]` / `CHIP_POST_CMD[]` | string[1] | mux 切換等前後置指令,`;` 分隔多筆 |
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| `CHIP_PRE_CMD[]` / `CHIP_POST_CMD[]` | string[1] | mux 切換等前後置指令,`;` 分隔多筆 |
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| `CH<n>_VNOM` | string | 標稱電壓(`"-"` = 未使用 / NC) |
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| `CH<n>_VNOM` | string | 這條軌的**基準電壓**(`"-"` = 未使用 / NC) |
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| `CH<n>_NET` | string | 電路 net name(對照 schematic) |
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| `CH<n>_NET` | string | 電路 net name(對照 schematic) |
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Channel 定址:`ch / 8` → `CHIPS[]` index,`ch % 8` → LTC2977 PMBus PAGE(0x00~0x07)。
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Channel 定址:`ch / 8` → `CHIPS[]` index,`ch % 8` → LTC2977 PMBus PAGE(0x00~0x07)。
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**`VNOM` 自 2026-08-30 起是「Blanton 實測中位數」,不是規格標稱值。** 144 條軌裡有 86 條
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被改上去 +0.8% ~ +2.5%(例:`PVDD3_3V_SYNTH_LDO_*` 3.3 → 3.38、`P0V9_AVDD_*` 0.9 → 0.915、
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`PVDD0_8V_T3` 0.8 → 0.82)。這件事影響兩處,**不是只有顯示**:
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- `margin_status` 的偏差 % 是對 `VNOM` 算的 —— 以前一條穩定在 0.756 V 的軌顯示 `+0.80%`,
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現在顯示 `0.00%`。**舊 log 的偏差 % 不能跟新 log 直接比。**
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- `margin_set` 的 high / low / OV / UV **全部由 `VNOM` 推算**(`VNOM × (1 ± change%)`),
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所以整個 margin 視窗跟著平移。同樣下 `+3%`,實際打到的絕對電壓比以前高。
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**SWB 通道與位址對應(2026-08-19 上機驗證,`ababb2c`):**
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**SWB 通道與位址對應(2026-08-19 上機驗證,`ababb2c`):**
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| FPGA I2C 通道 | 板 / 接頭 | LTC2977 位址(lo / hi) |
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| FPGA I2C 通道 | 板 / 接頭 | LTC2977 位址(lo / hi) |
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@@ -353,7 +364,7 @@ PROFILE_CHANNELS=( "0:high:8" "1:low:8" ... ) # "channel:operation:change_perc
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| **ICB / PDB 存取** | `vi2c_init/scan/read/write`、`vi2c_scan_all` | CB F3 VI2C proxy,~3.3 ms/reg,取代 VSPI 的 ~18 ms/reg(後者會踩 SMBus 25–35 ms timeout) |
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| **ICB / PDB 存取** | `vi2c_init/scan/read/write`、`vi2c_scan_all` | CB F3 VI2C proxy,~3.3 ms/reg,取代 VSPI 的 ~18 ms/reg(後者會踩 SMBus 25–35 ms timeout) |
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| **溫度** | `temp_cb` / `temp_icb` / `temp_all` | TMP75(12-bit 左靠齊 ×0.0625)、TMP432(含 RANGE bit 的 −64 偏移、remote1/2) |
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| **溫度** | `temp_cb` / `temp_icb` / `temp_all` | TMP75(12-bit 左靠齊 ×0.0625)、TMP432(含 RANGE bit 的 −64 偏移、remote1/2) |
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| **電源資料** | `pwr_data` / `pwr_data_pdb` / `pwr_pdb_id` | SWB VRM 全軌 Vin/Vout/Iout/Temp 對齊表;MP29816 解析度**執行期從 `MFR_VOUT_SCALE_LOOP` 讀**,不寫死 |
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| **電源資料** | `pwr_data` / `pwr_data_pdb` / `pwr_pdb_id` | SWB VRM 全軌 Vin/Vout/Iout/Temp 對齊表;MP29816 解析度**執行期從 `MFR_VOUT_SCALE_LOOP` 讀**,不寫死 |
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| **電壓 Margin** | `margin_init/status/set/apply_profile/save` + `*_all.sh` | 9 顆 LTC2980(CB CONN13、SWB0/1 CONN13~16)批次 high/low margin 與狀態掃描。v2.6.0 起 SWB 路徑真正接上共用 cb_i2c 後端,並有 `margin_swb_info/probe/scan/reset/sem` 除錯包裝 |
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| **電壓 Margin** | `margin_init/status/set/apply_profile/save` + `*_all.sh` | 9 顆 LTC2980(CB CONN13、SWB0/1 CONN13~16)批次 high/low margin 與狀態掃描。`VNOM` 為 Blanton 實測中位數(2026-08-30);SWB 的 profile 是 per-CONN,套錯 CONN 會 margin 到錯的軌且不報錯。v2.6.0 起 SWB 路徑真正接上共用 cb_i2c 後端,並有 `margin_swb_info/probe/scan/reset/sem` 除錯包裝 |
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| **Margin 寫 NVM** | `margin_save` / `margin_save all` / `margin_save blanton` | ⚠️ 永久寫入。`0x15` 送 PMBus **send-byte**(不帶 data byte)。`all` = 依 `settings/` 走 9 顆、跑完還原原本載入的板子;`blanton` = 本平台捷徑,18 顆全走原生 i2c bus(`MARGIN_BLANTON_STORE` 表),不需 `margin_init`。每筆之間 `MARGIN_STORE_SETTLE`(0.5s),工具**不 poll busy bit** |
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| **Margin 寫 NVM** | `margin_save` / `margin_save all` / `margin_save blanton` | ⚠️ 永久寫入。`0x15` 送 PMBus **send-byte**(不帶 data byte)。`all` = 依 `settings/` 走 9 顆、跑完還原原本載入的板子;`blanton` = 本平台捷徑,18 顆全走原生 i2c bus(`MARGIN_BLANTON_STORE` 表),不需 `margin_init`。每筆之間 `MARGIN_STORE_SETTLE`(0.5s),工具**不 poll busy bit** |
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| **管理網路 ping** | `mgmt_ping_monitor.sh {start\|stop\|status\|fg\|tail\|clear\|summary}` | 一輪 = 10G leg + 1G leg,各自 `ip address/route replace` 後 `ping -I <if>` 打自己的對端;兩張卡都保持 up。每 leg 記 `ip -s link show` 與該卡的 TX/RX packet delta,另出一行可 grep 的 `RESULT` |
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| **管理網路 ping** | `mgmt_ping_monitor.sh {start\|stop\|status\|fg\|tail\|clear\|summary}` | 一輪 = 10G leg + 1G leg,各自 `ip address/route replace` 後 `ping -I <if>` 打自己的對端;兩張卡都保持 up。每 leg 記 `ip -s link show` 與該卡的 TX/RX packet delta,另出一行可 grep 的 `RESULT` |
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| **BMC 監控** | `bmc_monitor.sh {start\|stop\|status\|fg\|tail\|clear}` | 由 host 端 `bmc-manager run` 週期取樣 `free -m`,另加一組 **I2C 寫入/讀回圖樣測試**(bus 1、addr 0x41、offset 0x00C0,寫 `55AA55AA` 讀回、再寫 `AA55AA55` 讀回)。B 啟動、C 停止並 `cat log/bmc_poll.log` |
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| **BMC 監控** | `bmc_monitor.sh {start\|stop\|status\|fg\|tail\|clear}` | 由 host 端 `bmc-manager run` 週期取樣 `free -m`,另加一組 **I2C 寫入/讀回圖樣測試**(bus 1、addr 0x41、offset 0x00C0,寫 `55AA55AA` 讀回、再寫 `AA55AA55` 讀回)。B 啟動、C 停止並 `cat log/bmc_poll.log` |
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@@ -9,7 +9,7 @@ DUT 端的取數能力由一組 **bash 工具庫** 提供(CB FPGA `pcimem` →
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完整架構見 [ARCHITECTURE.md](ARCHITECTURE.md)。
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完整架構見 [ARCHITECTURE.md](ARCHITECTURE.md)。
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**目前狀態(2026-08-28)**:Script A 為 **V1.1.2**(A 集中記錄 A/B/C 三支的變更)。涵蓋
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**目前狀態(2026-08-30)**:Script A 為 **V1.1.3**(A 集中記錄 A/B/C 三支的變更)。涵蓋
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PCIe AER / DDR EDAC / PMON+TPM / 電壓 margin(9 顆 LTC2980)/ SWB loopback 線速流量 /
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PCIe AER / DDR EDAC / PMON+TPM / 電壓 margin(9 顆 LTC2980)/ SWB loopback 線速流量 /
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10G+1G 管理網路 ping / BMC DDR 與 USB / NVMe 健康,壓力層走平台的 `bgctl`。
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10G+1G 管理網路 ping / BMC DDR 與 USB / NVMe 健康,壓力層走平台的 `bgctl`。
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switch unit 數量由 `config.ttl` 的 `SWB_UNIT0` / `SWB_UNIT1` 宣告,風扇轉速由 `FAN_SPEED` 指定
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switch unit 數量由 `config.ttl` 的 `SWB_UNIT0` / `SWB_UNIT1` 宣告,風扇轉速由 `FAN_SPEED` 指定
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@@ -23,7 +23,8 @@ TR518 負載(`blanton_tr518.sh`,**TTL 尚未接**)、SWB 軌功耗(`TH6_
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Script A 開頭會先收掉前一輪殘留(`hw-test-session finish` + `bgctl reset/stop --all`),
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Script A 開頭會先收掉前一輪殘留(`hw-test-session finish` + `bgctl reset/stop --all`),
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再 `bgctl list` 確認沒有 job 留著佔資源。
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再 `bgctl list` 確認沒有 job 留著佔資源。
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NFC tag 讀取由 `nfc_polling.sh` 背景輪詢(A 做基線、B 起、C 停並 report)。
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NFC tag 讀取由 `nfc_polling.sh` 背景輪詢(A 做基線、B 起、C 停並 report)。
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最後一次發布是 **V1.1.1**;SWB 的 I2C 通道與位址已於 2026-08-19 上機驗證。
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最後一次發布是 **V1.1.2**;SWB 的 I2C 通道與位址已於 2026-08-19 上機驗證。
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margin 的 `VNOM` 已於 2026-08-30 改為 Blanton 實測中位數(144 條軌中 86 條上調 0.8~2.5%)。
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交付用 `./publish/publish.sh` 打包。
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交付用 `./publish/publish.sh` 打包。
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## 技術棧
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## 技術棧
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@@ -218,6 +219,12 @@ Tera Term 連 COM port (115200-8-N-1)
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- ⚠️ **ICB/PDB 一律走 VI2C(`blanton_icb_vi2c.sh`),不要走 VSPI**:VSPI ~18 ms/reg 會讓 I2C
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- ⚠️ **ICB/PDB 一律走 VI2C(`blanton_icb_vi2c.sh`),不要走 VSPI**:VSPI ~18 ms/reg 會讓 I2C
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byte 相間隔拉到 ~50 ms,踩中 SMBus 25–35 ms timeout,裝置直接 NACK。實測全掃 9.4 s vs 34.0 s。
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byte 相間隔拉到 ~50 ms,踩中 SMBus 25–35 ms timeout,裝置直接 NACK。實測全掃 9.4 s vs 34.0 s。
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- ⚠️ **I2C 讀一律 Repeated START**(不是 STOP + START),否則 PMBus/SMBus 裝置(VRM、EFUSE)不理。
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- ⚠️ **I2C 讀一律 Repeated START**(不是 STOP + START),否則 PMBus/SMBus 裝置(VRM、EFUSE)不理。
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- ⚠️ **`settings/*.conf` 的 `VNOM` 是實測中位數,不是規格值**(2026-08-30 起)。它同時是
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`margin_status` 偏差 % 的分母、也是 `margin_set` 推算 high/low/OV/UV 的基準,所以改它會
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同時移動「看到的數字」和「實際打出去的電壓」。**跨這個日期的 margin log 不能直接互比。**
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- ⚠️ **SWB 的 margin profile 是 per-CONN 的**:`combo_SWB_CONN13~16_{high,low}` 各自的百分比
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對應該片板子的軌。套到別的 CONN 會 margin 到錯的軌,而且**不會報錯**。CB 沒有專屬 profile,
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用通用的 `combo_high3` / `combo_low3`
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- ⚠️ **`margin_save` / `STORE_USER_ALL` 會永久寫 NVM**,斷電保留 → **測試流程中絕不執行**,
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- ⚠️ **`margin_save` / `STORE_USER_ALL` 會永久寫 NVM**,斷電保留 → **測試流程中絕不執行**,
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以免覆蓋客戶出廠 config。`margin.sh` 的 auto-enable(`ON_OFF_CONFIG=0x1a`)只改 RAM,斷電復原。
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以免覆蓋客戶出廠 config。`margin.sh` 的 auto-enable(`ON_OFF_CONFIG=0x1a`)只改 RAM,斷電復原。
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v2.7.0 新增的 **`margin_save all` / `margin_save blanton` 一次寫 18 個 LTC2977**,
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v2.7.0 新增的 **`margin_save all` / `margin_save blanton` 一次寫 18 個 LTC2977**,
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@@ -6,7 +6,7 @@ CB,CONN13,CH3,V1P8_ALW,1.8
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CB,CONN13,CH4,PWR_APU_VDDIO_SUS,1.1
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CB,CONN13,CH4,PWR_APU_VDDIO_SUS,1.1
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CB,CONN13,CH5,PWR_VDD_MISC_RUN,0.75
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CB,CONN13,CH5,PWR_VDD_MISC_RUN,0.75
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CB,CONN13,CH6,PWR_APU_VDD_MEM_RUN,0.78
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CB,CONN13,CH6,PWR_APU_VDD_MEM_RUN,0.78
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CB,CONN13,CH7,V0P8_PHY2_DVDD,0.8
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CB,CONN13,CH7,V0P8_PHY2_DVDD,0.816
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CB,CONN13,CH8,V0P8_AVDD,0.8
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CB,CONN13,CH8,V0P8_AVDD,0.8
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CB,CONN13,CH9,V0P8_PHY,0.8
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CB,CONN13,CH9,V0P8_PHY,0.8
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CB,CONN13,CH10,V1P8_FPGA,1.8
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CB,CONN13,CH10,V1P8_FPGA,1.8
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@@ -14,132 +14,132 @@ CB,CONN13,CH11,V2P5_FPGA,2.5
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CB,CONN13,CH12,V1P1_FPGA,1.1
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CB,CONN13,CH12,V1P1_FPGA,1.1
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CB,CONN13,CH13,P5V_STBY,5.0
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CB,CONN13,CH13,P5V_STBY,5.0
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CB,CONN13,CH14,P3V3_STBY,3.3
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CB,CONN13,CH14,P3V3_STBY,3.3
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CB,CONN13,CH15,V0P8_PHY2_AVDD,0.8
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CB,CONN13,CH15,V0P8_PHY2_AVDD,0.816
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SWB0,CONN13,CH0,P0V75_DVDD_47,0.75
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SWB0,CONN13,CH0,P0V75_DVDD_47,0.75
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SWB0,CONN13,CH1,P0V75_AVDD_47,0.75
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SWB0,CONN13,CH1,P0V75_AVDD_47,0.756
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SWB0,CONN13,CH2,P1V5_AVDD_47,1.5
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SWB0,CONN13,CH2,P1V5_AVDD_47,1.524
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SWB0,CONN13,CH3,P0V9_AVDD_47,0.9
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SWB0,CONN13,CH3,P0V9_AVDD_47,0.915
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SWB0,CONN13,CH4,P1V8_1,1.8
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SWB0,CONN13,CH4,P1V8_1,1.816
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SWB0,CONN13,CH5,PVDD3_3V_SYNTH_LDO_A3,3.3
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SWB0,CONN13,CH5,PVDD3_3V_SYNTH_LDO_A3,3.38
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SWB0,CONN13,CH6,PVDD3_3V_SYNTH_LDO_B1,3.3
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SWB0,CONN13,CH6,PVDD3_3V_SYNTH_LDO_B1,3.38
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SWB0,CONN13,CH7,P1V8_3,1.8
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SWB0,CONN13,CH7,P1V8_3,1.816
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SWB0,CONN13,CH8,P1V8_DVDDIO_3,1.8
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SWB0,CONN13,CH8,P1V8_DVDDIO_3,1.8
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SWB0,CONN13,CH9,P0V75_DVDD_39,0.75
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SWB0,CONN13,CH9,P0V75_DVDD_39,0.75
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SWB0,CONN13,CH10,P0V75_AVDD_39,0.75
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SWB0,CONN13,CH10,P0V75_AVDD_39,0.756
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SWB0,CONN13,CH11,P1V5_AVDD_39,1.5
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SWB0,CONN13,CH11,P1V5_AVDD_39,1.524
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SWB0,CONN13,CH12,P0V9_AVDD_39,0.9
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SWB0,CONN13,CH12,P0V9_AVDD_39,0.915
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SWB0,CONN13,CH13,PVDD1V5_2,1.5
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SWB0,CONN13,CH13,PVDD1V5_2,1.5
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SWB0,CONN13,CH14,PVDD1V8_DUT,1.8
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SWB0,CONN13,CH14,PVDD1V8_DUT,1.8
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SWB0,CONN13,CH15,PVDD_MDIO,1.2
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SWB0,CONN13,CH15,PVDD_MDIO,1.2
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SWB0,CONN14,CH0,P0V75_AVDD_7,0.75
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SWB0,CONN14,CH0,P0V75_AVDD_7,0.756
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SWB0,CONN14,CH1,P1V5_AVDD_7,1.5
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SWB0,CONN14,CH1,P1V5_AVDD_7,1.524
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SWB0,CONN14,CH2,P0V9_AVDD_7,0.9
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SWB0,CONN14,CH2,P0V9_AVDD_7,0.915
|
||||||
SWB0,CONN14,CH3,P1V8_5,1.8
|
SWB0,CONN14,CH3,P1V8_5,1.816
|
||||||
SWB0,CONN14,CH4,P1V8_2,1.8
|
SWB0,CONN14,CH4,P1V8_2,1.816
|
||||||
SWB0,CONN14,CH5,PVDD3_3V_SYNTH_LDO_B2,3.3
|
SWB0,CONN14,CH5,PVDD3_3V_SYNTH_LDO_B2,3.38
|
||||||
SWB0,CONN14,CH6,PVDD3_3V_SYNTH_LDO_A2,3.3
|
SWB0,CONN14,CH6,PVDD3_3V_SYNTH_LDO_A2,3.38
|
||||||
SWB0,CONN14,CH7,PVDD3_3V_SYNTH_LDO_A1,3.3
|
SWB0,CONN14,CH7,PVDD3_3V_SYNTH_LDO_A1,3.38
|
||||||
SWB0,CONN14,CH8,PVDD1V5_TSC,1.5
|
SWB0,CONN14,CH8,PVDD1V5_TSC,1.516
|
||||||
SWB0,CONN14,CH9,PVDD1V5_ANLG,1.5
|
SWB0,CONN14,CH9,PVDD1V5_ANLG,1.516
|
||||||
SWB0,CONN14,CH10,NC,-
|
SWB0,CONN14,CH10,NC,-
|
||||||
SWB0,CONN14,CH11,NC,-
|
SWB0,CONN14,CH11,NC,-
|
||||||
SWB0,CONN14,CH12,PVDD1V5_1,1.5
|
SWB0,CONN14,CH12,PVDD1V5_1,1.5
|
||||||
SWB0,CONN14,CH13,NC,-
|
SWB0,CONN14,CH13,NC,-
|
||||||
SWB0,CONN14,CH14,P1V8_DVDDIO_1,1.8
|
SWB0,CONN14,CH14,P1V8_DVDDIO_1,1.8
|
||||||
SWB0,CONN14,CH15,P0V75_DVDD_7,0.75
|
SWB0,CONN14,CH15,P0V75_DVDD_7,0.75
|
||||||
SWB0,CONN15,CH0,P1V5_AVDD_55,1.5
|
SWB0,CONN15,CH0,P1V5_AVDD_55,1.524
|
||||||
SWB0,CONN15,CH1,P0V9_AVDD_55,0.9
|
SWB0,CONN15,CH1,P0V9_AVDD_55,0.915
|
||||||
SWB0,CONN15,CH2,P0V75_DVDD_63,0.75
|
SWB0,CONN15,CH2,P0V75_DVDD_63,0.75
|
||||||
SWB0,CONN15,CH3,P0V75_AVDD_63,0.75
|
SWB0,CONN15,CH3,P0V75_AVDD_63,0.756
|
||||||
SWB0,CONN15,CH4,P1V5_AVDD_63,1.5
|
SWB0,CONN15,CH4,P1V5_AVDD_63,1.524
|
||||||
SWB0,CONN15,CH5,P0V9_AVDD_63,0.9
|
SWB0,CONN15,CH5,P0V9_AVDD_63,0.915
|
||||||
SWB0,CONN15,CH6,PVDD3_3V_SYNTH_LDO_B3,3.3
|
SWB0,CONN15,CH6,PVDD3_3V_SYNTH_LDO_B3,3.38
|
||||||
SWB0,CONN15,CH7,PVDD1V5_3,1.5
|
SWB0,CONN15,CH7,PVDD1V5_3,1.5
|
||||||
SWB0,CONN15,CH8,P0V85_STBY,0.85
|
SWB0,CONN15,CH8,P0V85_STBY,0.85
|
||||||
SWB0,CONN15,CH9,P1V8_STBY,1.8
|
SWB0,CONN15,CH9,P1V8_STBY,1.8
|
||||||
SWB0,CONN15,CH10,NC,-
|
SWB0,CONN15,CH10,NC,-
|
||||||
SWB0,CONN15,CH11,P3V3_STBY,3.3
|
SWB0,CONN15,CH11,P3V3_STBY,3.3
|
||||||
SWB0,CONN15,CH12,PVDD0V9_2,0.9
|
SWB0,CONN15,CH12,PVDD0V9_2,0.91
|
||||||
SWB0,CONN15,CH13,P0V75_DVDD_55,0.75
|
SWB0,CONN15,CH13,P0V75_DVDD_55,0.75
|
||||||
SWB0,CONN15,CH14,P0V75_AVDD_55,0.75
|
SWB0,CONN15,CH14,P0V75_AVDD_55,0.756
|
||||||
SWB0,CONN15,CH15,P1V8_DVDDIO_4,1.8
|
SWB0,CONN15,CH15,P1V8_DVDDIO_4,1.8
|
||||||
SWB0,CONN16,CH0,PVDD1V5_0,1.5
|
SWB0,CONN16,CH0,PVDD1V5_0,1.5
|
||||||
SWB0,CONN16,CH1,P1V8_4,1.8
|
SWB0,CONN16,CH1,P1V8_4,1.816
|
||||||
SWB0,CONN16,CH2,PVDD3_3V_SYNTH_LDO_B5,3.3
|
SWB0,CONN16,CH2,PVDD3_3V_SYNTH_LDO_B5,3.38
|
||||||
SWB0,CONN16,CH3,PVDD3_3V_SYNTH_LDO_A5,3.3
|
SWB0,CONN16,CH3,PVDD3_3V_SYNTH_LDO_A5,3.38
|
||||||
SWB0,CONN16,CH4,PVDD3_3V_SYNTH_LDO_B4,3.3
|
SWB0,CONN16,CH4,PVDD3_3V_SYNTH_LDO_B4,3.38
|
||||||
SWB0,CONN16,CH5,PVDD3_3V_SYNTH_LDO_A4,3.3
|
SWB0,CONN16,CH5,PVDD3_3V_SYNTH_LDO_A4,3.38
|
||||||
SWB0,CONN16,CH6,P3V3,3.3
|
SWB0,CONN16,CH6,P3V3,3.327
|
||||||
SWB0,CONN16,CH7,PVDD0_8V_T3,0.8
|
SWB0,CONN16,CH7,PVDD0_8V_T3,0.82
|
||||||
SWB0,CONN16,CH8,P0V75_DVDD_1,0.75
|
SWB0,CONN16,CH8,P0V75_DVDD_1,0.75
|
||||||
SWB0,CONN16,CH9,P0V75_AVDD_1,0.75
|
SWB0,CONN16,CH9,P0V75_AVDD_1,0.756
|
||||||
SWB0,CONN16,CH10,P1V5_AVDD_1,1.5
|
SWB0,CONN16,CH10,P1V5_AVDD_1,1.524
|
||||||
SWB0,CONN16,CH11,P0V9_AVDD_1,0.9
|
SWB0,CONN16,CH11,P0V9_AVDD_1,0.915
|
||||||
SWB0,CONN16,CH12,PVDD0V9_0,0.9
|
SWB0,CONN16,CH12,PVDD0V9_0,0.915
|
||||||
SWB0,CONN16,CH13,PVDD0V9_1,0.9
|
SWB0,CONN16,CH13,PVDD0V9_1,0.91
|
||||||
SWB0,CONN16,CH14,PVDD0V9_3,0.9
|
SWB0,CONN16,CH14,PVDD0V9_3,0.915
|
||||||
SWB0,CONN16,CH15,PVDD1V2_T3,1.2
|
SWB0,CONN16,CH15,PVDD1V2_T3,1.224
|
||||||
SWB1,CONN13,CH0,P0V75_DVDD_47,0.75
|
SWB1,CONN13,CH0,P0V75_DVDD_47,0.75
|
||||||
SWB1,CONN13,CH1,P0V75_AVDD_47,0.75
|
SWB1,CONN13,CH1,P0V75_AVDD_47,0.756
|
||||||
SWB1,CONN13,CH2,P1V5_AVDD_47,1.5
|
SWB1,CONN13,CH2,P1V5_AVDD_47,1.524
|
||||||
SWB1,CONN13,CH3,P0V9_AVDD_47,0.9
|
SWB1,CONN13,CH3,P0V9_AVDD_47,0.915
|
||||||
SWB1,CONN13,CH4,P1V8_1,1.8
|
SWB1,CONN13,CH4,P1V8_1,1.816
|
||||||
SWB1,CONN13,CH5,PVDD3_3V_SYNTH_LDO_A3,3.3
|
SWB1,CONN13,CH5,PVDD3_3V_SYNTH_LDO_A3,3.38
|
||||||
SWB1,CONN13,CH6,PVDD3_3V_SYNTH_LDO_B1,3.3
|
SWB1,CONN13,CH6,PVDD3_3V_SYNTH_LDO_B1,3.38
|
||||||
SWB1,CONN13,CH7,P1V8_3,1.8
|
SWB1,CONN13,CH7,P1V8_3,1.816
|
||||||
SWB1,CONN13,CH8,P1V8_DVDDIO_3,1.8
|
SWB1,CONN13,CH8,P1V8_DVDDIO_3,1.8
|
||||||
SWB1,CONN13,CH9,P0V75_DVDD_39,0.75
|
SWB1,CONN13,CH9,P0V75_DVDD_39,0.75
|
||||||
SWB1,CONN13,CH10,P0V75_AVDD_39,0.75
|
SWB1,CONN13,CH10,P0V75_AVDD_39,0.756
|
||||||
SWB1,CONN13,CH11,P1V5_AVDD_39,1.5
|
SWB1,CONN13,CH11,P1V5_AVDD_39,1.524
|
||||||
SWB1,CONN13,CH12,P0V9_AVDD_39,0.9
|
SWB1,CONN13,CH12,P0V9_AVDD_39,0.915
|
||||||
SWB1,CONN13,CH13,PVDD1V5_2,1.5
|
SWB1,CONN13,CH13,PVDD1V5_2,1.5
|
||||||
SWB1,CONN13,CH14,PVDD1V8_DUT,1.8
|
SWB1,CONN13,CH14,PVDD1V8_DUT,1.8
|
||||||
SWB1,CONN13,CH15,PVDD_MDIO,1.2
|
SWB1,CONN13,CH15,PVDD_MDIO,1.2
|
||||||
SWB1,CONN14,CH0,P0V75_AVDD_7,0.75
|
SWB1,CONN14,CH0,P0V75_AVDD_7,0.756
|
||||||
SWB1,CONN14,CH1,P1V5_AVDD_7,1.5
|
SWB1,CONN14,CH1,P1V5_AVDD_7,1.524
|
||||||
SWB1,CONN14,CH2,P0V9_AVDD_7,0.9
|
SWB1,CONN14,CH2,P0V9_AVDD_7,0.915
|
||||||
SWB1,CONN14,CH3,P1V8_5,1.8
|
SWB1,CONN14,CH3,P1V8_5,1.816
|
||||||
SWB1,CONN14,CH4,P1V8_2,1.8
|
SWB1,CONN14,CH4,P1V8_2,1.816
|
||||||
SWB1,CONN14,CH5,PVDD3_3V_SYNTH_LDO_B2,3.3
|
SWB1,CONN14,CH5,PVDD3_3V_SYNTH_LDO_B2,3.38
|
||||||
SWB1,CONN14,CH6,PVDD3_3V_SYNTH_LDO_A2,3.3
|
SWB1,CONN14,CH6,PVDD3_3V_SYNTH_LDO_A2,3.38
|
||||||
SWB1,CONN14,CH7,PVDD3_3V_SYNTH_LDO_A1,3.3
|
SWB1,CONN14,CH7,PVDD3_3V_SYNTH_LDO_A1,3.38
|
||||||
SWB1,CONN14,CH8,PVDD1V5_TSC,1.5
|
SWB1,CONN14,CH8,PVDD1V5_TSC,1.516
|
||||||
SWB1,CONN14,CH9,PVDD1V5_ANLG,1.5
|
SWB1,CONN14,CH9,PVDD1V5_ANLG,1.516
|
||||||
SWB1,CONN14,CH10,NC,-
|
SWB1,CONN14,CH10,NC,-
|
||||||
SWB1,CONN14,CH11,NC,-
|
SWB1,CONN14,CH11,NC,-
|
||||||
SWB1,CONN14,CH12,PVDD1V5_1,1.5
|
SWB1,CONN14,CH12,PVDD1V5_1,1.5
|
||||||
SWB1,CONN14,CH13,NC,-
|
SWB1,CONN14,CH13,NC,-
|
||||||
SWB1,CONN14,CH14,P1V8_DVDDIO_1,1.8
|
SWB1,CONN14,CH14,P1V8_DVDDIO_1,1.8
|
||||||
SWB1,CONN14,CH15,P0V75_DVDD_7,0.75
|
SWB1,CONN14,CH15,P0V75_DVDD_7,0.75
|
||||||
SWB1,CONN15,CH0,P1V5_AVDD_55,1.5
|
SWB1,CONN15,CH0,P1V5_AVDD_55,1.524
|
||||||
SWB1,CONN15,CH1,P0V9_AVDD_55,0.9
|
SWB1,CONN15,CH1,P0V9_AVDD_55,0.915
|
||||||
SWB1,CONN15,CH2,P0V75_DVDD_63,0.75
|
SWB1,CONN15,CH2,P0V75_DVDD_63,0.75
|
||||||
SWB1,CONN15,CH3,P0V75_AVDD_63,0.75
|
SWB1,CONN15,CH3,P0V75_AVDD_63,0.756
|
||||||
SWB1,CONN15,CH4,P1V5_AVDD_63,1.5
|
SWB1,CONN15,CH4,P1V5_AVDD_63,1.524
|
||||||
SWB1,CONN15,CH5,P0V9_AVDD_63,0.9
|
SWB1,CONN15,CH5,P0V9_AVDD_63,0.915
|
||||||
SWB1,CONN15,CH6,PVDD3_3V_SYNTH_LDO_B3,3.3
|
SWB1,CONN15,CH6,PVDD3_3V_SYNTH_LDO_B3,3.38
|
||||||
SWB1,CONN15,CH7,PVDD1V5_3,1.5
|
SWB1,CONN15,CH7,PVDD1V5_3,1.5
|
||||||
SWB1,CONN15,CH8,P0V85_STBY,0.85
|
SWB1,CONN15,CH8,P0V85_STBY,0.85
|
||||||
SWB1,CONN15,CH9,P1V8_STBY,1.8
|
SWB1,CONN15,CH9,P1V8_STBY,1.8
|
||||||
SWB1,CONN15,CH10,NC,-
|
SWB1,CONN15,CH10,NC,-
|
||||||
SWB1,CONN15,CH11,P3V3_STBY,3.3
|
SWB1,CONN15,CH11,P3V3_STBY,3.3
|
||||||
SWB1,CONN15,CH12,PVDD0V9_2,0.9
|
SWB1,CONN15,CH12,PVDD0V9_2,0.91
|
||||||
SWB1,CONN15,CH13,P0V75_DVDD_55,0.75
|
SWB1,CONN15,CH13,P0V75_DVDD_55,0.75
|
||||||
SWB1,CONN15,CH14,P0V75_AVDD_55,0.75
|
SWB1,CONN15,CH14,P0V75_AVDD_55,0.756
|
||||||
SWB1,CONN15,CH15,P1V8_DVDDIO_4,1.8
|
SWB1,CONN15,CH15,P1V8_DVDDIO_4,1.8
|
||||||
SWB1,CONN16,CH0,PVDD1V5_0,1.5
|
SWB1,CONN16,CH0,PVDD1V5_0,1.5
|
||||||
SWB1,CONN16,CH1,P1V8_4,1.8
|
SWB1,CONN16,CH1,P1V8_4,1.816
|
||||||
SWB1,CONN16,CH2,PVDD3_3V_SYNTH_LDO_B5,3.3
|
SWB1,CONN16,CH2,PVDD3_3V_SYNTH_LDO_B5,3.38
|
||||||
SWB1,CONN16,CH3,PVDD3_3V_SYNTH_LDO_A5,3.3
|
SWB1,CONN16,CH3,PVDD3_3V_SYNTH_LDO_A5,3.38
|
||||||
SWB1,CONN16,CH4,PVDD3_3V_SYNTH_LDO_B4,3.3
|
SWB1,CONN16,CH4,PVDD3_3V_SYNTH_LDO_B4,3.38
|
||||||
SWB1,CONN16,CH5,PVDD3_3V_SYNTH_LDO_A4,3.3
|
SWB1,CONN16,CH5,PVDD3_3V_SYNTH_LDO_A4,3.38
|
||||||
SWB1,CONN16,CH6,P3V3,3.3
|
SWB1,CONN16,CH6,P3V3,3.327
|
||||||
SWB1,CONN16,CH7,PVDD0_8V_T3,0.8
|
SWB1,CONN16,CH7,PVDD0_8V_T3,0.82
|
||||||
SWB1,CONN16,CH8,P0V75_DVDD_1,0.75
|
SWB1,CONN16,CH8,P0V75_DVDD_1,0.75
|
||||||
SWB1,CONN16,CH9,P0V75_AVDD_1,0.75
|
SWB1,CONN16,CH9,P0V75_AVDD_1,0.756
|
||||||
SWB1,CONN16,CH10,P1V5_AVDD_1,1.5
|
SWB1,CONN16,CH10,P1V5_AVDD_1,1.524
|
||||||
SWB1,CONN16,CH11,P0V9_AVDD_1,0.9
|
SWB1,CONN16,CH11,P0V9_AVDD_1,0.915
|
||||||
SWB1,CONN16,CH12,PVDD0V9_0,0.9
|
SWB1,CONN16,CH12,PVDD0V9_0,0.915
|
||||||
SWB1,CONN16,CH13,PVDD0V9_1,0.9
|
SWB1,CONN16,CH13,PVDD0V9_1,0.91
|
||||||
SWB1,CONN16,CH14,PVDD0V9_3,0.9
|
SWB1,CONN16,CH14,PVDD0V9_3,0.915
|
||||||
SWB1,CONN16,CH15,PVDD1V2_T3,1.2
|
SWB1,CONN16,CH15,PVDD1V2_T3,1.224
|
||||||
|
|||||||
|
@@ -0,0 +1,59 @@
|
|||||||
|
# v1.1.3 — Margin now measures against what this platform actually runs at
|
||||||
|
|
||||||
|
## ✨ New features
|
||||||
|
|
||||||
|
**Per-CONN margin profiles for the switch boards**
|
||||||
|
* `combo_SWB_CONN13_high` / `_low` through `combo_SWB_CONN16_high` / `_low` replace the old `comboA` / `comboB` pair. Each file's per-channel percentages follow the rails on *that* board, so a CONN13 profile is no longer a rough fit for CONN16.
|
||||||
|
* SWB0 and SWB1 share a profile per CONN — the two boards carry identical rails and differ only by I2C bus.
|
||||||
|
* A high pass and a low pass are now the same run with `_high` swapped for `_low`.
|
||||||
|
* **A profile applied to the wrong CONN margins the wrong rails and says nothing.** The percentages are positional, so nothing detects the mismatch. `margin_apply_profile_all.sh` now names the right profile per board instead of one name for all nine.
|
||||||
|
|
||||||
|
## 🐛 Bug fixes
|
||||||
|
|
||||||
|
**`VNOM` was the spec value, not what the rails actually sit at**
|
||||||
|
* 86 of the 144 channels moved up between +0.8% and +2.5% to the measured median for this platform — `PVDD3_3V_SYNTH_LDO_*` 3.3 → 3.38, `P0V9_AVDD_*` 0.9 → 0.915, `PVDD0_8V_T3` 0.8 → 0.82, and so on.
|
||||||
|
* **This is not a display change.** `VNOM` is the denominator of `margin_status`'s deviation %, *and* the basis `margin_set` derives high / low / OV / UV from. A rail sitting steady at 0.756 V used to read `+0.80%` against a nominal 0.75 and now reads `0.00%`; and asking for `+3%` now lands on a different absolute voltage than it did last week.
|
||||||
|
* **Margin logs from before and after this build cannot be compared directly.** The numbers moved because the reference moved, not because the hardware did.
|
||||||
|
|
||||||
|
**The batch profile script pointed at files that no longer exist**
|
||||||
|
* `margin_apply_profile_all.sh` still named `comboA` for all nine boards. With `comboA.conf` removed, every board would have stopped at `Profile not found` — a nine-line wall of errors on a script that is normally left to run.
|
||||||
|
|
||||||
|
**The channel map CSV was stale**
|
||||||
|
* `docs/LTC2980_channel_map.csv` is generated from `settings/*.conf`, so all 86 changed rails were wrong in it. Regenerated with `tools/gen_channel_map.sh`. It is output, not source — regenerate it, never hand-edit it.
|
||||||
|
|
||||||
|
## 📦 Downloads
|
||||||
|
|
||||||
|
| File | Contents |
|
||||||
|
|---|---|
|
||||||
|
| `Script_ABC_Blanton_V1.1.3.zip` | The full Tera Term working directory, including `Blanton_Script/` to copy onto the DUT |
|
||||||
|
|
||||||
|
**After copying to the DUT:**
|
||||||
|
|
||||||
|
```bash
|
||||||
|
chmod +x ~/Blanton_Script/*.sh # see below
|
||||||
|
grep -rlU $'\r' ~/Blanton_Script # expect no output
|
||||||
|
```
|
||||||
|
|
||||||
|
`blanton_ber.sh` and `nfc_polling.sh` are invoked by the macros through `./` or `~/`, so they need the execute bit along with `bmc_monitor.sh` and `usb_target.sh` — neither git nor a Windows/USB copy carries it reliably.
|
||||||
|
|
||||||
|
## ⚠️ Before you run
|
||||||
|
|
||||||
|
* **Re-baseline your margin expectations.** Any pass/fail limits or golden logs derived from the old `VNOM` values need redoing against this build.
|
||||||
|
* **`margin_save` in any form writes NVM permanently** and now writes margin windows derived from the new reference. Run `margin_status_all.sh` first and never call it during a test.
|
||||||
|
* **SWB profiles are per-CONN.** Applying `combo_SWB_CONN13_high` to a CONN16 board is silently wrong.
|
||||||
|
* **These three tests cannot share the switch**: `blanton_ber.sh`, `blanton_tr518.sh` and `blanton_traffic_linespeed`.
|
||||||
|
* **PRBS takes the links down** while `blanton_ber.sh` is armed.
|
||||||
|
* **`ce0` keeps running until you stop it.**
|
||||||
|
* **Two numbers must stay in step**: Script C's `sleep 30` and `blanton_ber.sh`'s `BER_INTERVAL`.
|
||||||
|
* **`FAN_SPEED` is 100** — the fans run flat out unless you change `config.ttl`.
|
||||||
|
* **`nfc_polling.sh start` clears the log**, so Script B wipes Script A's NFC baseline file (the numbers are already in the console log).
|
||||||
|
* **The NFC tool is written for the customer's tag.** It polls Type A / B / F only and parses Type A strictly; a tag of another technology is never discovered and fails as `no RF interface activation notification received`. Without `--expected-id` it does not check identity, so a different tag of the same type still passes.
|
||||||
|
* **The three items listed as unverified in v1.1.0 are still unverified**: the `ce0` ingress mirror, the 120s settle in `blanton_tr518.sh`, and `test mode nr=no` on stop.
|
||||||
|
|
||||||
|
## 🔗 Links
|
||||||
|
|
||||||
|
* [ARCHITECTURE.md](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/src/branch/main/ARCHITECTURE.md) — test flow, data models, constraints
|
||||||
|
* [CLAUDE.md](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/src/branch/main/CLAUDE.md) — commands and the bench gotchas
|
||||||
|
* [LTC2980_channel_map.csv](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/src/branch/main/docs/LTC2980_channel_map.csv) — all 144 margin channels with the new `VNOM`
|
||||||
|
|
||||||
|
**Full changelog:** [V1.1.2...V1.1.3](https://etgit.et-wen.com/etwen/Blanton_TTL_Script/compare/V1.1.2...V1.1.3)
|
||||||
@@ -1,7 +1,7 @@
|
|||||||
; =============================================================================
|
; =============================================================================
|
||||||
; Script A for Blanton
|
; Script A for Blanton
|
||||||
; Version : V1.1.2
|
; Version : V1.1.3
|
||||||
; Date : 2026-08-28
|
; Date : 2026-08-30
|
||||||
; Author : ETWen
|
; Author : ETWen
|
||||||
; =============================================================================
|
; =============================================================================
|
||||||
; Version History:
|
; Version History:
|
||||||
@@ -161,6 +161,23 @@
|
|||||||
; the job dir for the USB archive
|
; the job dir for the USB archive
|
||||||
; Fix: that cp said nfc_polling.log - the file is
|
; Fix: that cp said nfc_polling.log - the file is
|
||||||
; nfc_poll.log, so the NFC log never reached the USB
|
; nfc_poll.log, so the NFC log never reached the USB
|
||||||
|
; V1.1.3 2026-08-30 LTC2980_Margin_Script/settings/*.conf VNOM is now the measured median, not the spec value
|
||||||
|
; 86 of 144 rails moved up +0.8% .. +2.5%
|
||||||
|
; (3.3 -> 3.38, 0.9 -> 0.915, 0.8 -> 0.82, ...)
|
||||||
|
; This is NOT display-only: VNOM is the denominator of
|
||||||
|
; margin_status deviation % AND the basis margin_set
|
||||||
|
; derives high/low/OV/UV from, so the whole margin
|
||||||
|
; window shifts with it
|
||||||
|
; !! margin logs from before/after cannot be compared
|
||||||
|
; LTC2980_Margin_Script/profiles/ Add per-CONN SWB profiles, drop comboA/comboB
|
||||||
|
; combo_SWB_CONN13..16_{high,low} - the percentages
|
||||||
|
; follow that board rails, so applying one to a
|
||||||
|
; different CONN margins the wrong things, silently
|
||||||
|
; SWB0 and SWB1 share a profile per CONN (same rails)
|
||||||
|
; LTC2980_Margin_Script/script/*.sh Fix: margin_apply_profile_all.sh still pointed every
|
||||||
|
; board at comboA, which this change deleted - all 9
|
||||||
|
; boards would have failed with "Profile not found"
|
||||||
|
; docs/LTC2980_channel_map.csv Regenerated (tools/gen_channel_map.sh) - it is output
|
||||||
; =============================================================================
|
; =============================================================================
|
||||||
include "config.ttl"
|
include "config.ttl"
|
||||||
|
|
||||||
|
|||||||
@@ -72,13 +72,13 @@ margin_operation 0 high
|
|||||||
margin_operation 0 nominal
|
margin_operation 0 nominal
|
||||||
|
|
||||||
# 批次套用 profile(套在當前載入的 LTC2980)
|
# 批次套用 profile(套在當前載入的 LTC2980)
|
||||||
margin_apply_profile profiles/comboA.conf
|
margin_apply_profile profiles/combo_SWB_CONN13_high.conf
|
||||||
margin_apply_profile profiles/comboB.conf
|
margin_apply_profile profiles/combo_SWB_CONN13_low.conf
|
||||||
margin_apply_profile profiles/all_off.conf
|
margin_apply_profile profiles/all_off.conf
|
||||||
|
|
||||||
# 切換到另一顆 LTC2980
|
# 切換到另一顆 LTC2980
|
||||||
margin_init Blanton_SWB1_CONN16
|
margin_init Blanton_SWB1_CONN16
|
||||||
margin_apply_profile profiles/comboA.conf
|
margin_apply_profile profiles/combo_SWB_CONN16_high.conf
|
||||||
|
|
||||||
# 儲存到 NVM(斷電後保留)
|
# 儲存到 NVM(斷電後保留)
|
||||||
margin_save # 只寫當前載入的那顆
|
margin_save # 只寫當前載入的那顆
|
||||||
@@ -108,7 +108,7 @@ BOARDS=(
|
|||||||
## 一次套 profile 到所有 LTC2980
|
## 一次套 profile 到所有 LTC2980
|
||||||
|
|
||||||
`script/margin_apply_profile_all.sh` 對多顆 LTC2980 依 `BOARDS[i]` 配對
|
`script/margin_apply_profile_all.sh` 對多顆 LTC2980 依 `BOARDS[i]` 配對
|
||||||
`PROFILES[i]` 套用 profile(預設全部 `comboA`)。
|
`PROFILES[i]` 套用 profile(預設 SWB 各用自己 CONN 的 `_high`,CB 用 `combo_high3`)。
|
||||||
|
|
||||||
```bash
|
```bash
|
||||||
source script/margin_apply_profile_all.sh
|
source script/margin_apply_profile_all.sh
|
||||||
@@ -124,8 +124,8 @@ BOARDS=(
|
|||||||
)
|
)
|
||||||
|
|
||||||
PROFILES=(
|
PROFILES=(
|
||||||
"comboA" # Blanton_CB_CONN13
|
"combo_high3" # Blanton_CB_CONN13
|
||||||
"comboB" # Blanton_SWB0_CONN13 ← 改成 comboB
|
"combo_SWB_CONN13_high" # Blanton_SWB0_CONN13
|
||||||
...
|
...
|
||||||
)
|
)
|
||||||
```
|
```
|
||||||
@@ -133,6 +133,10 @@ PROFILES=(
|
|||||||
`PROFILES` 寫名字即可(不含路徑跟 `.conf`),script 會自動展開成
|
`PROFILES` 寫名字即可(不含路徑跟 `.conf`),script 會自動展開成
|
||||||
`profiles/<name>.conf`。兩個陣列長度不一致會直接報錯。
|
`profiles/<name>.conf`。兩個陣列長度不一致會直接報錯。
|
||||||
|
|
||||||
|
> ⚠️ **SWB 的 profile 是 per-CONN 的**:每個檔的百分比對應該片板子的軌,
|
||||||
|
> 套到別的 CONN 會 margin 到錯的東西(而且不會報錯)。這裡不能全部填同一個名字。
|
||||||
|
> HIGH / LOW 兩輪就是把 `_high` 全換成 `_low` 再跑一次。
|
||||||
|
|
||||||
## 一次把所有 LTC2980 寫入 NVM
|
## 一次把所有 LTC2980 寫入 NVM
|
||||||
|
|
||||||
> ⚠️ `margin_save` 會把當前 margin / OV / UV 設定**永久寫入 NVM**,
|
> ⚠️ `margin_save` 會把當前 margin / OV / UV 設定**永久寫入 NVM**,
|
||||||
@@ -217,6 +221,22 @@ i2cset -f -y 14 0x62 0x15 ; i2cset -f -y 14 0x64 0x15 # SWB1 CONN16
|
|||||||
不要讓它去打不存在的板子。bus 節點不存在(`/dev/i2c-N` 沒有)與晶片不回應(NACK)
|
不要讓它去打不存在的板子。bus 節點不存在(`/dev/i2c-N` 沒有)與晶片不回應(NACK)
|
||||||
會分別報不同訊息 —— 前者代表 FPGA 的 i2c adapter 根本沒 enumerate,後者才是板子的問題。
|
會分別報不同訊息 —— 前者代表 FPGA 的 i2c adapter 根本沒 enumerate,後者才是板子的問題。
|
||||||
|
|
||||||
|
## Profile 一覽
|
||||||
|
|
||||||
|
| Profile | 適用 | 說明 |
|
||||||
|
|---|---|---|
|
||||||
|
| `combo_SWB_CONN13_high` / `_low` | **SWB CONN13 專用** | 每個 channel 依該板的軌給 3% 或 5% |
|
||||||
|
| `combo_SWB_CONN14_high` / `_low` | **SWB CONN14 專用** | 同上 |
|
||||||
|
| `combo_SWB_CONN15_high` / `_low` | **SWB CONN15 專用** | 同上 |
|
||||||
|
| `combo_SWB_CONN16_high` / `_low` | **SWB CONN16 專用** | 同上 |
|
||||||
|
| `combo_high3` / `combo_low3` | 通用 | 全部 channel ±3% |
|
||||||
|
| `combo_high5` / `combo_low5` | 通用 | 全部 channel ±5% |
|
||||||
|
| `combo_normal` | 通用 | 全部回 nominal |
|
||||||
|
| `all_off` | 通用 | 全部 OPERATION off |
|
||||||
|
|
||||||
|
SWB0 和 SWB1 的同號 CONN 共用同一個 profile(兩片板的軌完全相同,
|
||||||
|
只差 I2C bus)。CB CONN13 沒有專屬 profile,用通用的 `combo_high3` / `combo_low3`。
|
||||||
|
|
||||||
## Operation 對應
|
## Operation 對應
|
||||||
|
|
||||||
| 參數 | PMBus 0x01 值 | 說明 |
|
| 參數 | PMBus 0x01 值 | 說明 |
|
||||||
|
|||||||
@@ -1,22 +0,0 @@
|
|||||||
# Profile: comboA - alternating high/low (even=high, odd=low)
|
|
||||||
# Applied to whichever LTC2980 is currently loaded via margin_init
|
|
||||||
# Format: "channel:operation:change_percent"
|
|
||||||
|
|
||||||
PROFILE_CHANNELS=(
|
|
||||||
"0:high:8"
|
|
||||||
"1:low:8"
|
|
||||||
"2:high:8"
|
|
||||||
"3:low:8"
|
|
||||||
"4:high:8"
|
|
||||||
"5:low:8"
|
|
||||||
"6:high:8"
|
|
||||||
"7:low:8"
|
|
||||||
"8:high:8"
|
|
||||||
"9:low:8"
|
|
||||||
"10:high:8"
|
|
||||||
"11:low:8"
|
|
||||||
"12:high:8"
|
|
||||||
"13:low:8"
|
|
||||||
"14:high:8"
|
|
||||||
"15:low:8"
|
|
||||||
)
|
|
||||||
@@ -1,22 +0,0 @@
|
|||||||
# Profile: comboB - inverse of comboA (even=low, odd=high)
|
|
||||||
# Applied to whichever LTC2980 is currently loaded via margin_init
|
|
||||||
# Format: "channel:operation:change_percent"
|
|
||||||
|
|
||||||
PROFILE_CHANNELS=(
|
|
||||||
"0:low:8"
|
|
||||||
"1:high:8"
|
|
||||||
"2:low:8"
|
|
||||||
"3:high:8"
|
|
||||||
"4:low:8"
|
|
||||||
"5:high:8"
|
|
||||||
"6:low:8"
|
|
||||||
"7:high:8"
|
|
||||||
"8:low:8"
|
|
||||||
"9:high:8"
|
|
||||||
"10:low:8"
|
|
||||||
"11:high:8"
|
|
||||||
"12:low:8"
|
|
||||||
"13:high:8"
|
|
||||||
"14:low:8"
|
|
||||||
"15:high:8"
|
|
||||||
)
|
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN13_high - every channel margin HIGH, per-channel percentage
|
||||||
|
# For the SWB CONN13 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:high:3"
|
||||||
|
"1:high:3"
|
||||||
|
"2:high:3"
|
||||||
|
"3:high:3"
|
||||||
|
"4:high:5"
|
||||||
|
"5:high:5"
|
||||||
|
"6:high:5"
|
||||||
|
"7:high:5"
|
||||||
|
"8:high:5"
|
||||||
|
"9:high:3"
|
||||||
|
"10:high:3"
|
||||||
|
"11:high:3"
|
||||||
|
"12:high:3"
|
||||||
|
"13:high:3"
|
||||||
|
"14:high:3"
|
||||||
|
"15:high:5"
|
||||||
|
)
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN13_low - every channel margin LOW, per-channel percentage
|
||||||
|
# For the SWB CONN13 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:low:3"
|
||||||
|
"1:low:3"
|
||||||
|
"2:low:3"
|
||||||
|
"3:low:3"
|
||||||
|
"4:low:5"
|
||||||
|
"5:low:5"
|
||||||
|
"6:low:5"
|
||||||
|
"7:low:5"
|
||||||
|
"8:low:5"
|
||||||
|
"9:low:3"
|
||||||
|
"10:low:3"
|
||||||
|
"11:low:3"
|
||||||
|
"12:low:3"
|
||||||
|
"13:low:3"
|
||||||
|
"14:low:3"
|
||||||
|
"15:low:5"
|
||||||
|
)
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN14_high - every channel margin HIGH, per-channel percentage
|
||||||
|
# For the SWB CONN14 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:high:3"
|
||||||
|
"1:high:3"
|
||||||
|
"2:high:3"
|
||||||
|
"3:high:5"
|
||||||
|
"4:high:5"
|
||||||
|
"5:high:5"
|
||||||
|
"6:high:5"
|
||||||
|
"7:high:5"
|
||||||
|
"8:high:3"
|
||||||
|
"9:high:3"
|
||||||
|
"10:nominal:5"
|
||||||
|
"11:nominal:5"
|
||||||
|
"12:high:3"
|
||||||
|
"13:nominal:5"
|
||||||
|
"14:high:5"
|
||||||
|
"15:high:3"
|
||||||
|
)
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN14_low - every channel margin LOW, per-channel percentage
|
||||||
|
# For the SWB CONN14 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:low:3"
|
||||||
|
"1:low:3"
|
||||||
|
"2:low:3"
|
||||||
|
"3:low:5"
|
||||||
|
"4:low:5"
|
||||||
|
"5:low:5"
|
||||||
|
"6:low:5"
|
||||||
|
"7:low:5"
|
||||||
|
"8:low:3"
|
||||||
|
"9:low:3"
|
||||||
|
"10:nominal:5"
|
||||||
|
"11:nominal:5"
|
||||||
|
"12:low:3"
|
||||||
|
"13:nominal:5"
|
||||||
|
"14:low:5"
|
||||||
|
"15:low:3"
|
||||||
|
)
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN15_high - every channel margin HIGH, per-channel percentage
|
||||||
|
# For the SWB CONN15 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:high:3"
|
||||||
|
"1:high:3"
|
||||||
|
"2:high:3"
|
||||||
|
"3:high:3"
|
||||||
|
"4:high:3"
|
||||||
|
"5:high:3"
|
||||||
|
"6:high:5"
|
||||||
|
"7:high:3"
|
||||||
|
"8:high:5"
|
||||||
|
"9:high:5"
|
||||||
|
"10:nominal:5"
|
||||||
|
"11:high:5"
|
||||||
|
"12:high:3"
|
||||||
|
"13:high:3"
|
||||||
|
"14:high:3"
|
||||||
|
"15:high:5"
|
||||||
|
)
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN15_low - every channel margin LOW, per-channel percentage
|
||||||
|
# For the SWB CONN15 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:low:3"
|
||||||
|
"1:low:3"
|
||||||
|
"2:low:3"
|
||||||
|
"3:low:3"
|
||||||
|
"4:low:3"
|
||||||
|
"5:low:3"
|
||||||
|
"6:low:5"
|
||||||
|
"7:low:3"
|
||||||
|
"8:low:5"
|
||||||
|
"9:low:5"
|
||||||
|
"10:nominal:5"
|
||||||
|
"11:low:5"
|
||||||
|
"12:low:3"
|
||||||
|
"13:low:3"
|
||||||
|
"14:low:3"
|
||||||
|
"15:low:5"
|
||||||
|
)
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN16_high - every channel margin HIGH, per-channel percentage
|
||||||
|
# For the SWB CONN16 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:high:3"
|
||||||
|
"1:high:5"
|
||||||
|
"2:high:5"
|
||||||
|
"3:high:5"
|
||||||
|
"4:high:5"
|
||||||
|
"5:high:5"
|
||||||
|
"6:high:5"
|
||||||
|
"7:high:3"
|
||||||
|
"8:high:3"
|
||||||
|
"9:high:3"
|
||||||
|
"10:high:3"
|
||||||
|
"11:high:3"
|
||||||
|
"12:high:3"
|
||||||
|
"13:high:3"
|
||||||
|
"14:high:3"
|
||||||
|
"15:high:3"
|
||||||
|
)
|
||||||
+24
@@ -0,0 +1,24 @@
|
|||||||
|
# Profile: combo_SWB_CONN16_low - every channel margin LOW, per-channel percentage
|
||||||
|
# For the SWB CONN16 board only: the percentages follow that board's
|
||||||
|
# rails, so applying it to a different CONN margins the wrong things.
|
||||||
|
# Applied to whichever LTC2980 is currently loaded via margin_init
|
||||||
|
# Format: "channel:operation:change_percent"
|
||||||
|
|
||||||
|
PROFILE_CHANNELS=(
|
||||||
|
"0:low:3"
|
||||||
|
"1:low:5"
|
||||||
|
"2:low:5"
|
||||||
|
"3:low:5"
|
||||||
|
"4:low:5"
|
||||||
|
"5:low:5"
|
||||||
|
"6:low:5"
|
||||||
|
"7:low:3"
|
||||||
|
"8:low:3"
|
||||||
|
"9:low:3"
|
||||||
|
"10:low:3"
|
||||||
|
"11:low:3"
|
||||||
|
"12:low:3"
|
||||||
|
"13:low:3"
|
||||||
|
"14:low:3"
|
||||||
|
"15:low:3"
|
||||||
|
)
|
||||||
+17
-10
@@ -17,17 +17,24 @@ BOARDS=(
|
|||||||
"Blanton_SWB1_CONN16"
|
"Blanton_SWB1_CONN16"
|
||||||
)
|
)
|
||||||
|
|
||||||
# 對應的 profile 名稱(不含路徑與 .conf 副檔名),預設全部 comboA
|
# 對應的 profile 名稱(不含路徑與 .conf 副檔名)。
|
||||||
|
#
|
||||||
|
# SWB 的 profile 是 per-CONN 的:百分比對應該片板子的軌,套到別的 CONN 會 margin
|
||||||
|
# 到錯的東西,所以這裡不能全部填同一個名字。
|
||||||
|
#
|
||||||
|
# 這份預設是 HIGH 那一輪;LOW 那一輪把下面的 _high 全換成 _low 再跑一次
|
||||||
|
# (或 sed -i 's/_high/_low/' 這個檔)。
|
||||||
|
# CB 沒有 per-CONN profile,沿用通用的 combo_high3 / combo_low3。
|
||||||
PROFILES=(
|
PROFILES=(
|
||||||
"comboA" # Blanton_CB_CONN13
|
"combo_high3" # Blanton_CB_CONN13 (低壓軌多,用通用 +3%)
|
||||||
"comboA" # Blanton_SWB0_CONN13
|
"combo_SWB_CONN13_high" # Blanton_SWB0_CONN13
|
||||||
"comboA" # Blanton_SWB0_CONN14
|
"combo_SWB_CONN14_high" # Blanton_SWB0_CONN14
|
||||||
"comboA" # Blanton_SWB0_CONN15
|
"combo_SWB_CONN15_high" # Blanton_SWB0_CONN15
|
||||||
"comboA" # Blanton_SWB0_CONN16
|
"combo_SWB_CONN16_high" # Blanton_SWB0_CONN16
|
||||||
"comboA" # Blanton_SWB1_CONN13
|
"combo_SWB_CONN13_high" # Blanton_SWB1_CONN13
|
||||||
"comboA" # Blanton_SWB1_CONN14
|
"combo_SWB_CONN14_high" # Blanton_SWB1_CONN14
|
||||||
"comboA" # Blanton_SWB1_CONN15
|
"combo_SWB_CONN15_high" # Blanton_SWB1_CONN15
|
||||||
"comboA" # Blanton_SWB1_CONN16
|
"combo_SWB_CONN16_high" # Blanton_SWB1_CONN16
|
||||||
)
|
)
|
||||||
|
|
||||||
# --- Source margin.sh if not already loaded ---
|
# --- Source margin.sh if not already loaded ---
|
||||||
|
|||||||
+2
-2
@@ -41,7 +41,7 @@ CH3_VNOM="1.8"; CH3_NET="V1P8_ALW"
|
|||||||
CH4_VNOM="1.1"; CH4_NET="PWR_APU_VDDIO_SUS"
|
CH4_VNOM="1.1"; CH4_NET="PWR_APU_VDDIO_SUS"
|
||||||
CH5_VNOM="0.75"; CH5_NET="PWR_VDD_MISC_RUN"
|
CH5_VNOM="0.75"; CH5_NET="PWR_VDD_MISC_RUN"
|
||||||
CH6_VNOM="0.78"; CH6_NET="PWR_APU_VDD_MEM_RUN"
|
CH6_VNOM="0.78"; CH6_NET="PWR_APU_VDD_MEM_RUN"
|
||||||
CH7_VNOM="0.8"; CH7_NET="V0P8_PHY2_DVDD"
|
CH7_VNOM="0.816"; CH7_NET="V0P8_PHY2_DVDD"
|
||||||
CH8_VNOM="0.8"; CH8_NET="V0P8_AVDD"
|
CH8_VNOM="0.8"; CH8_NET="V0P8_AVDD"
|
||||||
CH9_VNOM="0.8"; CH9_NET="V0P8_PHY"
|
CH9_VNOM="0.8"; CH9_NET="V0P8_PHY"
|
||||||
CH10_VNOM="1.8"; CH10_NET="V1P8_FPGA"
|
CH10_VNOM="1.8"; CH10_NET="V1P8_FPGA"
|
||||||
@@ -49,4 +49,4 @@ CH11_VNOM="2.5"; CH11_NET="V2P5_FPGA"
|
|||||||
CH12_VNOM="1.1"; CH12_NET="V1P1_FPGA"
|
CH12_VNOM="1.1"; CH12_NET="V1P1_FPGA"
|
||||||
CH13_VNOM="5.0"; CH13_NET="P5V_STBY"
|
CH13_VNOM="5.0"; CH13_NET="P5V_STBY"
|
||||||
CH14_VNOM="3.3"; CH14_NET="P3V3_STBY"
|
CH14_VNOM="3.3"; CH14_NET="P3V3_STBY"
|
||||||
CH15_VNOM="0.8"; CH15_NET="V0P8_PHY2_AVDD"
|
CH15_VNOM="0.816"; CH15_NET="V0P8_PHY2_AVDD"
|
||||||
|
|||||||
+10
-10
@@ -35,18 +35,18 @@ CHIP_POST_CMD=(
|
|||||||
# chip1: SWB0 (CONN13)
|
# chip1: SWB0 (CONN13)
|
||||||
# ============================================================
|
# ============================================================
|
||||||
CH0_VNOM="0.75"; CH0_NET="P0V75_DVDD_47"
|
CH0_VNOM="0.75"; CH0_NET="P0V75_DVDD_47"
|
||||||
CH1_VNOM="0.75"; CH1_NET="P0V75_AVDD_47"
|
CH1_VNOM="0.756"; CH1_NET="P0V75_AVDD_47"
|
||||||
CH2_VNOM="1.5"; CH2_NET="P1V5_AVDD_47"
|
CH2_VNOM="1.524"; CH2_NET="P1V5_AVDD_47"
|
||||||
CH3_VNOM="0.9"; CH3_NET="P0V9_AVDD_47"
|
CH3_VNOM="0.915"; CH3_NET="P0V9_AVDD_47"
|
||||||
CH4_VNOM="1.8"; CH4_NET="P1V8_1"
|
CH4_VNOM="1.816"; CH4_NET="P1V8_1"
|
||||||
CH5_VNOM="3.3"; CH5_NET="PVDD3_3V_SYNTH_LDO_A3"
|
CH5_VNOM="3.38"; CH5_NET="PVDD3_3V_SYNTH_LDO_A3"
|
||||||
CH6_VNOM="3.3"; CH6_NET="PVDD3_3V_SYNTH_LDO_B1"
|
CH6_VNOM="3.38"; CH6_NET="PVDD3_3V_SYNTH_LDO_B1"
|
||||||
CH7_VNOM="1.8"; CH7_NET="P1V8_3"
|
CH7_VNOM="1.816"; CH7_NET="P1V8_3"
|
||||||
CH8_VNOM="1.8"; CH8_NET="P1V8_DVDDIO_3"
|
CH8_VNOM="1.8"; CH8_NET="P1V8_DVDDIO_3"
|
||||||
CH9_VNOM="0.75"; CH9_NET="P0V75_DVDD_39"
|
CH9_VNOM="0.75"; CH9_NET="P0V75_DVDD_39"
|
||||||
CH10_VNOM="0.75"; CH10_NET="P0V75_AVDD_39"
|
CH10_VNOM="0.756"; CH10_NET="P0V75_AVDD_39"
|
||||||
CH11_VNOM="1.5"; CH11_NET="P1V5_AVDD_39"
|
CH11_VNOM="1.524"; CH11_NET="P1V5_AVDD_39"
|
||||||
CH12_VNOM="0.9"; CH12_NET="P0V9_AVDD_39"
|
CH12_VNOM="0.915"; CH12_NET="P0V9_AVDD_39"
|
||||||
CH13_VNOM="1.5"; CH13_NET="PVDD1V5_2"
|
CH13_VNOM="1.5"; CH13_NET="PVDD1V5_2"
|
||||||
CH14_VNOM="1.8"; CH14_NET="PVDD1V8_DUT"
|
CH14_VNOM="1.8"; CH14_NET="PVDD1V8_DUT"
|
||||||
CH15_VNOM="1.2"; CH15_NET="PVDD_MDIO"
|
CH15_VNOM="1.2"; CH15_NET="PVDD_MDIO"
|
||||||
|
|||||||
+10
-10
@@ -34,16 +34,16 @@ CHIP_POST_CMD=(
|
|||||||
# ============================================================
|
# ============================================================
|
||||||
# chip1: SWB0 (CONN14)
|
# chip1: SWB0 (CONN14)
|
||||||
# ============================================================
|
# ============================================================
|
||||||
CH0_VNOM="0.75"; CH0_NET="P0V75_AVDD_7"
|
CH0_VNOM="0.756"; CH0_NET="P0V75_AVDD_7"
|
||||||
CH1_VNOM="1.5"; CH1_NET="P1V5_AVDD_7"
|
CH1_VNOM="1.524"; CH1_NET="P1V5_AVDD_7"
|
||||||
CH2_VNOM="0.9"; CH2_NET="P0V9_AVDD_7"
|
CH2_VNOM="0.915"; CH2_NET="P0V9_AVDD_7"
|
||||||
CH3_VNOM="1.8"; CH3_NET="P1V8_5"
|
CH3_VNOM="1.816"; CH3_NET="P1V8_5"
|
||||||
CH4_VNOM="1.8"; CH4_NET="P1V8_2"
|
CH4_VNOM="1.816"; CH4_NET="P1V8_2"
|
||||||
CH5_VNOM="3.3"; CH5_NET="PVDD3_3V_SYNTH_LDO_B2"
|
CH5_VNOM="3.38"; CH5_NET="PVDD3_3V_SYNTH_LDO_B2"
|
||||||
CH6_VNOM="3.3"; CH6_NET="PVDD3_3V_SYNTH_LDO_A2"
|
CH6_VNOM="3.38"; CH6_NET="PVDD3_3V_SYNTH_LDO_A2"
|
||||||
CH7_VNOM="3.3"; CH7_NET="PVDD3_3V_SYNTH_LDO_A1"
|
CH7_VNOM="3.38"; CH7_NET="PVDD3_3V_SYNTH_LDO_A1"
|
||||||
CH8_VNOM="1.5"; CH8_NET="PVDD1V5_TSC"
|
CH8_VNOM="1.516"; CH8_NET="PVDD1V5_TSC"
|
||||||
CH9_VNOM="1.5"; CH9_NET="PVDD1V5_ANLG"
|
CH9_VNOM="1.516"; CH9_NET="PVDD1V5_ANLG"
|
||||||
CH10_VNOM="-"; CH10_NET="NC"
|
CH10_VNOM="-"; CH10_NET="NC"
|
||||||
CH11_VNOM="-"; CH11_NET="NC"
|
CH11_VNOM="-"; CH11_NET="NC"
|
||||||
CH12_VNOM="1.5"; CH12_NET="PVDD1V5_1"
|
CH12_VNOM="1.5"; CH12_NET="PVDD1V5_1"
|
||||||
|
|||||||
+8
-8
@@ -34,19 +34,19 @@ CHIP_POST_CMD=(
|
|||||||
# ============================================================
|
# ============================================================
|
||||||
# chip1: SWB0 (CONN15)
|
# chip1: SWB0 (CONN15)
|
||||||
# ============================================================
|
# ============================================================
|
||||||
CH0_VNOM="1.5"; CH0_NET="P1V5_AVDD_55"
|
CH0_VNOM="1.524"; CH0_NET="P1V5_AVDD_55"
|
||||||
CH1_VNOM="0.9"; CH1_NET="P0V9_AVDD_55"
|
CH1_VNOM="0.915"; CH1_NET="P0V9_AVDD_55"
|
||||||
CH2_VNOM="0.75"; CH2_NET="P0V75_DVDD_63"
|
CH2_VNOM="0.75"; CH2_NET="P0V75_DVDD_63"
|
||||||
CH3_VNOM="0.75"; CH3_NET="P0V75_AVDD_63"
|
CH3_VNOM="0.756"; CH3_NET="P0V75_AVDD_63"
|
||||||
CH4_VNOM="1.5"; CH4_NET="P1V5_AVDD_63"
|
CH4_VNOM="1.524"; CH4_NET="P1V5_AVDD_63"
|
||||||
CH5_VNOM="0.9"; CH5_NET="P0V9_AVDD_63"
|
CH5_VNOM="0.915"; CH5_NET="P0V9_AVDD_63"
|
||||||
CH6_VNOM="3.3"; CH6_NET="PVDD3_3V_SYNTH_LDO_B3"
|
CH6_VNOM="3.38"; CH6_NET="PVDD3_3V_SYNTH_LDO_B3"
|
||||||
CH7_VNOM="1.5"; CH7_NET="PVDD1V5_3"
|
CH7_VNOM="1.5"; CH7_NET="PVDD1V5_3"
|
||||||
CH8_VNOM="0.85"; CH8_NET="P0V85_STBY"
|
CH8_VNOM="0.85"; CH8_NET="P0V85_STBY"
|
||||||
CH9_VNOM="1.8"; CH9_NET="P1V8_STBY"
|
CH9_VNOM="1.8"; CH9_NET="P1V8_STBY"
|
||||||
CH10_VNOM="-"; CH10_NET="NC"
|
CH10_VNOM="-"; CH10_NET="NC"
|
||||||
CH11_VNOM="3.3"; CH11_NET="P3V3_STBY"
|
CH11_VNOM="3.3"; CH11_NET="P3V3_STBY"
|
||||||
CH12_VNOM="0.9"; CH12_NET="PVDD0V9_2"
|
CH12_VNOM="0.91"; CH12_NET="PVDD0V9_2"
|
||||||
CH13_VNOM="0.75"; CH13_NET="P0V75_DVDD_55"
|
CH13_VNOM="0.75"; CH13_NET="P0V75_DVDD_55"
|
||||||
CH14_VNOM="0.75"; CH14_NET="P0V75_AVDD_55"
|
CH14_VNOM="0.756"; CH14_NET="P0V75_AVDD_55"
|
||||||
CH15_VNOM="1.8"; CH15_NET="P1V8_DVDDIO_4"
|
CH15_VNOM="1.8"; CH15_NET="P1V8_DVDDIO_4"
|
||||||
|
|||||||
+14
-14
@@ -35,18 +35,18 @@ CHIP_POST_CMD=(
|
|||||||
# chip1: SWB0 (CONN16)
|
# chip1: SWB0 (CONN16)
|
||||||
# ============================================================
|
# ============================================================
|
||||||
CH0_VNOM="1.5"; CH0_NET="PVDD1V5_0"
|
CH0_VNOM="1.5"; CH0_NET="PVDD1V5_0"
|
||||||
CH1_VNOM="1.8"; CH1_NET="P1V8_4"
|
CH1_VNOM="1.816"; CH1_NET="P1V8_4"
|
||||||
CH2_VNOM="3.3"; CH2_NET="PVDD3_3V_SYNTH_LDO_B5"
|
CH2_VNOM="3.38"; CH2_NET="PVDD3_3V_SYNTH_LDO_B5"
|
||||||
CH3_VNOM="3.3"; CH3_NET="PVDD3_3V_SYNTH_LDO_A5"
|
CH3_VNOM="3.38"; CH3_NET="PVDD3_3V_SYNTH_LDO_A5"
|
||||||
CH4_VNOM="3.3"; CH4_NET="PVDD3_3V_SYNTH_LDO_B4"
|
CH4_VNOM="3.38"; CH4_NET="PVDD3_3V_SYNTH_LDO_B4"
|
||||||
CH5_VNOM="3.3"; CH5_NET="PVDD3_3V_SYNTH_LDO_A4"
|
CH5_VNOM="3.38"; CH5_NET="PVDD3_3V_SYNTH_LDO_A4"
|
||||||
CH6_VNOM="3.3"; CH6_NET="P3V3"
|
CH6_VNOM="3.327"; CH6_NET="P3V3"
|
||||||
CH7_VNOM="0.8"; CH7_NET="PVDD0_8V_T3"
|
CH7_VNOM="0.82"; CH7_NET="PVDD0_8V_T3"
|
||||||
CH8_VNOM="0.75"; CH8_NET="P0V75_DVDD_1"
|
CH8_VNOM="0.75"; CH8_NET="P0V75_DVDD_1"
|
||||||
CH9_VNOM="0.75"; CH9_NET="P0V75_AVDD_1"
|
CH9_VNOM="0.756"; CH9_NET="P0V75_AVDD_1"
|
||||||
CH10_VNOM="1.5"; CH10_NET="P1V5_AVDD_1"
|
CH10_VNOM="1.524"; CH10_NET="P1V5_AVDD_1"
|
||||||
CH11_VNOM="0.9"; CH11_NET="P0V9_AVDD_1"
|
CH11_VNOM="0.915"; CH11_NET="P0V9_AVDD_1"
|
||||||
CH12_VNOM="0.9"; CH12_NET="PVDD0V9_0"
|
CH12_VNOM="0.915"; CH12_NET="PVDD0V9_0"
|
||||||
CH13_VNOM="0.9"; CH13_NET="PVDD0V9_1"
|
CH13_VNOM="0.91"; CH13_NET="PVDD0V9_1"
|
||||||
CH14_VNOM="0.9"; CH14_NET="PVDD0V9_3"
|
CH14_VNOM="0.915"; CH14_NET="PVDD0V9_3"
|
||||||
CH15_VNOM="1.2"; CH15_NET="PVDD1V2_T3"
|
CH15_VNOM="1.224"; CH15_NET="PVDD1V2_T3"
|
||||||
|
|||||||
+10
-10
@@ -35,18 +35,18 @@ CHIP_POST_CMD=(
|
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# chip1: SWB1 (CONN13)
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# chip1: SWB1 (CONN13)
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||||||
# ============================================================
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# ============================================================
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||||||
CH0_VNOM="0.75"; CH0_NET="P0V75_DVDD_47"
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CH0_VNOM="0.75"; CH0_NET="P0V75_DVDD_47"
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||||||
CH1_VNOM="0.75"; CH1_NET="P0V75_AVDD_47"
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CH1_VNOM="0.756"; CH1_NET="P0V75_AVDD_47"
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||||||
CH2_VNOM="1.5"; CH2_NET="P1V5_AVDD_47"
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CH2_VNOM="1.524"; CH2_NET="P1V5_AVDD_47"
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||||||
CH3_VNOM="0.9"; CH3_NET="P0V9_AVDD_47"
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CH3_VNOM="0.915"; CH3_NET="P0V9_AVDD_47"
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||||||
CH4_VNOM="1.8"; CH4_NET="P1V8_1"
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CH4_VNOM="1.816"; CH4_NET="P1V8_1"
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||||||
CH5_VNOM="3.3"; CH5_NET="PVDD3_3V_SYNTH_LDO_A3"
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CH5_VNOM="3.38"; CH5_NET="PVDD3_3V_SYNTH_LDO_A3"
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||||||
CH6_VNOM="3.3"; CH6_NET="PVDD3_3V_SYNTH_LDO_B1"
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CH6_VNOM="3.38"; CH6_NET="PVDD3_3V_SYNTH_LDO_B1"
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||||||
CH7_VNOM="1.8"; CH7_NET="P1V8_3"
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CH7_VNOM="1.816"; CH7_NET="P1V8_3"
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||||||
CH8_VNOM="1.8"; CH8_NET="P1V8_DVDDIO_3"
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CH8_VNOM="1.8"; CH8_NET="P1V8_DVDDIO_3"
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||||||
CH9_VNOM="0.75"; CH9_NET="P0V75_DVDD_39"
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CH9_VNOM="0.75"; CH9_NET="P0V75_DVDD_39"
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||||||
CH10_VNOM="0.75"; CH10_NET="P0V75_AVDD_39"
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CH10_VNOM="0.756"; CH10_NET="P0V75_AVDD_39"
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||||||
CH11_VNOM="1.5"; CH11_NET="P1V5_AVDD_39"
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CH11_VNOM="1.524"; CH11_NET="P1V5_AVDD_39"
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||||||
CH12_VNOM="0.9"; CH12_NET="P0V9_AVDD_39"
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CH12_VNOM="0.915"; CH12_NET="P0V9_AVDD_39"
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||||||
CH13_VNOM="1.5"; CH13_NET="PVDD1V5_2"
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CH13_VNOM="1.5"; CH13_NET="PVDD1V5_2"
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||||||
CH14_VNOM="1.8"; CH14_NET="PVDD1V8_DUT"
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CH14_VNOM="1.8"; CH14_NET="PVDD1V8_DUT"
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||||||
CH15_VNOM="1.2"; CH15_NET="PVDD_MDIO"
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CH15_VNOM="1.2"; CH15_NET="PVDD_MDIO"
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||||||
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+10
-10
@@ -34,16 +34,16 @@ CHIP_POST_CMD=(
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|||||||
# ============================================================
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# ============================================================
|
||||||
# chip1: SWB1 (CONN14)
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# chip1: SWB1 (CONN14)
|
||||||
# ============================================================
|
# ============================================================
|
||||||
CH0_VNOM="0.75"; CH0_NET="P0V75_AVDD_7"
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CH0_VNOM="0.756"; CH0_NET="P0V75_AVDD_7"
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||||||
CH1_VNOM="1.5"; CH1_NET="P1V5_AVDD_7"
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CH1_VNOM="1.524"; CH1_NET="P1V5_AVDD_7"
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||||||
CH2_VNOM="0.9"; CH2_NET="P0V9_AVDD_7"
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CH2_VNOM="0.915"; CH2_NET="P0V9_AVDD_7"
|
||||||
CH3_VNOM="1.8"; CH3_NET="P1V8_5"
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CH3_VNOM="1.816"; CH3_NET="P1V8_5"
|
||||||
CH4_VNOM="1.8"; CH4_NET="P1V8_2"
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CH4_VNOM="1.816"; CH4_NET="P1V8_2"
|
||||||
CH5_VNOM="3.3"; CH5_NET="PVDD3_3V_SYNTH_LDO_B2"
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CH5_VNOM="3.38"; CH5_NET="PVDD3_3V_SYNTH_LDO_B2"
|
||||||
CH6_VNOM="3.3"; CH6_NET="PVDD3_3V_SYNTH_LDO_A2"
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CH6_VNOM="3.38"; CH6_NET="PVDD3_3V_SYNTH_LDO_A2"
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||||||
CH7_VNOM="3.3"; CH7_NET="PVDD3_3V_SYNTH_LDO_A1"
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CH7_VNOM="3.38"; CH7_NET="PVDD3_3V_SYNTH_LDO_A1"
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||||||
CH8_VNOM="1.5"; CH8_NET="PVDD1V5_TSC"
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CH8_VNOM="1.516"; CH8_NET="PVDD1V5_TSC"
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||||||
CH9_VNOM="1.5"; CH9_NET="PVDD1V5_ANLG"
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CH9_VNOM="1.516"; CH9_NET="PVDD1V5_ANLG"
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||||||
CH10_VNOM="-"; CH10_NET="NC"
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CH10_VNOM="-"; CH10_NET="NC"
|
||||||
CH11_VNOM="-"; CH11_NET="NC"
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CH11_VNOM="-"; CH11_NET="NC"
|
||||||
CH12_VNOM="1.5"; CH12_NET="PVDD1V5_1"
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CH12_VNOM="1.5"; CH12_NET="PVDD1V5_1"
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||||||
|
|||||||
+8
-8
@@ -34,19 +34,19 @@ CHIP_POST_CMD=(
|
|||||||
# ============================================================
|
# ============================================================
|
||||||
# chip1: SWB1 (CONN15)
|
# chip1: SWB1 (CONN15)
|
||||||
# ============================================================
|
# ============================================================
|
||||||
CH0_VNOM="1.5"; CH0_NET="P1V5_AVDD_55"
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CH0_VNOM="1.524"; CH0_NET="P1V5_AVDD_55"
|
||||||
CH1_VNOM="0.9"; CH1_NET="P0V9_AVDD_55"
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CH1_VNOM="0.915"; CH1_NET="P0V9_AVDD_55"
|
||||||
CH2_VNOM="0.75"; CH2_NET="P0V75_DVDD_63"
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CH2_VNOM="0.75"; CH2_NET="P0V75_DVDD_63"
|
||||||
CH3_VNOM="0.75"; CH3_NET="P0V75_AVDD_63"
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CH3_VNOM="0.756"; CH3_NET="P0V75_AVDD_63"
|
||||||
CH4_VNOM="1.5"; CH4_NET="P1V5_AVDD_63"
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CH4_VNOM="1.524"; CH4_NET="P1V5_AVDD_63"
|
||||||
CH5_VNOM="0.9"; CH5_NET="P0V9_AVDD_63"
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CH5_VNOM="0.915"; CH5_NET="P0V9_AVDD_63"
|
||||||
CH6_VNOM="3.3"; CH6_NET="PVDD3_3V_SYNTH_LDO_B3"
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CH6_VNOM="3.38"; CH6_NET="PVDD3_3V_SYNTH_LDO_B3"
|
||||||
CH7_VNOM="1.5"; CH7_NET="PVDD1V5_3"
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CH7_VNOM="1.5"; CH7_NET="PVDD1V5_3"
|
||||||
CH8_VNOM="0.85"; CH8_NET="P0V85_STBY"
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CH8_VNOM="0.85"; CH8_NET="P0V85_STBY"
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||||||
CH9_VNOM="1.8"; CH9_NET="P1V8_STBY"
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CH9_VNOM="1.8"; CH9_NET="P1V8_STBY"
|
||||||
CH10_VNOM="-"; CH10_NET="NC"
|
CH10_VNOM="-"; CH10_NET="NC"
|
||||||
CH11_VNOM="3.3"; CH11_NET="P3V3_STBY"
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CH11_VNOM="3.3"; CH11_NET="P3V3_STBY"
|
||||||
CH12_VNOM="0.9"; CH12_NET="PVDD0V9_2"
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CH12_VNOM="0.91"; CH12_NET="PVDD0V9_2"
|
||||||
CH13_VNOM="0.75"; CH13_NET="P0V75_DVDD_55"
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CH13_VNOM="0.75"; CH13_NET="P0V75_DVDD_55"
|
||||||
CH14_VNOM="0.75"; CH14_NET="P0V75_AVDD_55"
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CH14_VNOM="0.756"; CH14_NET="P0V75_AVDD_55"
|
||||||
CH15_VNOM="1.8"; CH15_NET="P1V8_DVDDIO_4"
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CH15_VNOM="1.8"; CH15_NET="P1V8_DVDDIO_4"
|
||||||
|
|||||||
+14
-14
@@ -35,18 +35,18 @@ CHIP_POST_CMD=(
|
|||||||
# chip1: SWB1 (CONN16)
|
# chip1: SWB1 (CONN16)
|
||||||
# ============================================================
|
# ============================================================
|
||||||
CH0_VNOM="1.5"; CH0_NET="PVDD1V5_0"
|
CH0_VNOM="1.5"; CH0_NET="PVDD1V5_0"
|
||||||
CH1_VNOM="1.8"; CH1_NET="P1V8_4"
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CH1_VNOM="1.816"; CH1_NET="P1V8_4"
|
||||||
CH2_VNOM="3.3"; CH2_NET="PVDD3_3V_SYNTH_LDO_B5"
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CH2_VNOM="3.38"; CH2_NET="PVDD3_3V_SYNTH_LDO_B5"
|
||||||
CH3_VNOM="3.3"; CH3_NET="PVDD3_3V_SYNTH_LDO_A5"
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CH3_VNOM="3.38"; CH3_NET="PVDD3_3V_SYNTH_LDO_A5"
|
||||||
CH4_VNOM="3.3"; CH4_NET="PVDD3_3V_SYNTH_LDO_B4"
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CH4_VNOM="3.38"; CH4_NET="PVDD3_3V_SYNTH_LDO_B4"
|
||||||
CH5_VNOM="3.3"; CH5_NET="PVDD3_3V_SYNTH_LDO_A4"
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CH5_VNOM="3.38"; CH5_NET="PVDD3_3V_SYNTH_LDO_A4"
|
||||||
CH6_VNOM="3.3"; CH6_NET="P3V3"
|
CH6_VNOM="3.327"; CH6_NET="P3V3"
|
||||||
CH7_VNOM="0.8"; CH7_NET="PVDD0_8V_T3"
|
CH7_VNOM="0.82"; CH7_NET="PVDD0_8V_T3"
|
||||||
CH8_VNOM="0.75"; CH8_NET="P0V75_DVDD_1"
|
CH8_VNOM="0.75"; CH8_NET="P0V75_DVDD_1"
|
||||||
CH9_VNOM="0.75"; CH9_NET="P0V75_AVDD_1"
|
CH9_VNOM="0.756"; CH9_NET="P0V75_AVDD_1"
|
||||||
CH10_VNOM="1.5"; CH10_NET="P1V5_AVDD_1"
|
CH10_VNOM="1.524"; CH10_NET="P1V5_AVDD_1"
|
||||||
CH11_VNOM="0.9"; CH11_NET="P0V9_AVDD_1"
|
CH11_VNOM="0.915"; CH11_NET="P0V9_AVDD_1"
|
||||||
CH12_VNOM="0.9"; CH12_NET="PVDD0V9_0"
|
CH12_VNOM="0.915"; CH12_NET="PVDD0V9_0"
|
||||||
CH13_VNOM="0.9"; CH13_NET="PVDD0V9_1"
|
CH13_VNOM="0.91"; CH13_NET="PVDD0V9_1"
|
||||||
CH14_VNOM="0.9"; CH14_NET="PVDD0V9_3"
|
CH14_VNOM="0.915"; CH14_NET="PVDD0V9_3"
|
||||||
CH15_VNOM="1.2"; CH15_NET="PVDD1V2_T3"
|
CH15_VNOM="1.224"; CH15_NET="PVDD1V2_T3"
|
||||||
|
|||||||
Reference in New Issue
Block a user