blanton_fpga_pcimem.sh V1.5.0.
The four FUNCT0..3_RES sysfs paths were hard-coded and had to be
edited for every DUT, because the CB FPGA's BDF changes with the
PCIe enumeration (0000:03:00.x / 0000:05:00.x seen so far).
Detection order at source time: FPGA_BDF override -> sysfs scan for
vendor 0x1590 with all four functions exposing resource0 -> lspci
-Dnn name/id match -> FPGA_BDF_FALLBACK. Adds fpga_rescan for a
DUT swap, FPGA_BDF / FPGA_VENDOR_ID / FPGA_LSPCI_MATCH overrides,
FPGA_BDF_ACTIVE reporting and FPGA_QUIET. Detection runs once, so
cb_fpga / pmc / icb / swb keep zero per-command overhead.
- utils/setup_pmon.ttl: add 'show platform leak status' and 'leak channels'
- Script A: move setup_pmon include into the TAKE DATA block
- Script B: soak loop now reuses utils/setup_pmon.ttl instead of inline fan/temperature
- Script C: fix header title (was 'Script B')
Bring the Blanton Tera Term TTL test suite under version control and
document how the pieces fit together.
- ARCHITECTURE.md: A/B/C script roles, host-to-DUT-to-FPGA data path,
config/settings/profile data models, PCIe AER + EDAC topology table,
10 key constraints, and 6 development phases derived from the
Status_20260814 spreadsheet's On-Going items
- CLAUDE.md: stack, smoke-test commands, conventions, and the hardware
footguns (per-unit BDF, VSPI vs VI2C timing, repeated START,
STORE_USER_ALL, ARB_LOST false positives)
- secret/: gitignored credential store with README + .example template,
so the DUT login stops living in 1_Blanton_Script_A.ttl
- .gitignore: secret/*, For_AI/, *.log, publish/, *.DSN
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_014RetWKFZFG1ZHcitQAyhwM
etwen
